blob: ec5c52e0b261b449c645bb59bb3d61f257fe5af8 [file] [log] [blame]
Yinghai Luf55b58d2007-02-17 14:28:11 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Yinghai Luf55b58d2007-02-17 14:28:11 +00003 *
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <console/console.h>
23#include <device/pci.h>
24#include <device/pci_ids.h>
25#include <string.h>
26#include <stdint.h>
27#if CONFIG_LOGICAL_CPUS==1
28#include <cpu/amd/dualcore.h>
29#endif
30
31#include <cpu/amd/amdk8_sysconf.h>
32
33#include "mb_sysconf.h"
34
35// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
36struct mb_sysconf_t mb_sysconf;
37
38unsigned pci1234x[] =
39{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
40 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
41 0x0000ff0,
42 0x0000ff0,
43 0x0000ff0,
44// 0x0000ff0,
45// 0x0000ff0,
46// 0x0000ff0,
47// 0x0000ff0,
48// 0x0000ff0
49};
50unsigned hcdnx[] =
51{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
52 0x20202020,
53 0x20202020,
54 0x20202020,
55// 0x20202020,
56// 0x20202020,
57// 0x20202020,
58// 0x20202020,
59// 0x20202020,
60};
61
62
63extern void get_sblk_pci1234(void);
64
65static unsigned get_bus_conf_done = 0;
66
67static unsigned get_hcid(unsigned i)
68{
69 unsigned id = 0;
70
71 unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
72
73 unsigned devn = sysconf.hcdn[i] & 0xff;
74
75 device_t dev;
76
77 dev = dev_find_slot(busn, PCI_DEVFN(devn,0));
78
79 switch (dev->device) {
80 case 0x0369: //IO55
81 id = 4;
82 break;
83 }
84
85 // we may need more way to find out hcid: subsystem id? GPIO read ?
86
87 // we need use id for 1. bus num, 2. mptable, 3. acpi table
88
89 return id;
90}
91
92void get_bus_conf(void)
93{
94
95 unsigned apicid_base;
96 struct mb_sysconf_t *m;
97
98 device_t dev;
99 int i, j;
100
101 if(get_bus_conf_done==1) return; //do it only once
102
103 get_bus_conf_done = 1;
104
105 sysconf.mb = &mb_sysconf;
106
107 m = sysconf.mb;
108 memset(m, 0, sizeof(struct mb_sysconf_t));
109
110 sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]);
111
112 for(i=0;i<sysconf.hc_possible_num; i++) {
113 sysconf.pci1234[i] = pci1234x[i];
114 sysconf.hcdn[i] = hcdnx[i];
115 }
116
117 get_sblk_pci1234();
118
119 sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
120
121 m->sbdnb = (sysconf.hcdn[1] & 0xff); // first byte of second chain
122
123 m->bus_type[0] = 1; //pci
124
125 m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
126
127 /* MCP55 */
128 dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06,0));
129 if (dev) {
130 m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
131 }
132 else {
133 printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
134 }
135
136 for(i=2; i<8;i++) {
137 dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2 , 0));
138 if (dev) {
139 m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
140 }
141 else {
142 printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
143 }
144 }
145
146 if(m->bus_mcp55[2]) {
147 for(i=0;i<2; i++) {
148 dev = dev_find_slot(m->bus_mcp55[2], PCI_DEVFN(0, i));
149 if(dev) {
150 m->bus_pcix[0] = m->bus_mcp55[2];
151 m->bus_pcix[i+1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
152 }
153 }
154 }
155
156 for(i=0; i< sysconf.hc_possible_num; i++) {
157 if(!(sysconf.pci1234[i] & 0x1) ) continue;
158
159 unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
160 unsigned busn_max = (sysconf.pci1234[i] >> 24) & 0xff;
161 for (j = busn; j <= busn_max; j++)
162 m->bus_type[j] = 1;
163 if(m->bus_isa <= busn_max)
164 m->bus_isa = busn_max + 1;
165 printk_debug("i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
166 }
167
168 /* MCP55b */
169 for(i=1; i< sysconf.hc_possible_num; i++) {
170 if (!(sysconf.pci1234[i] & 0x0f) ) continue;
171 // check hcid type here
172 sysconf.hcid[i] = get_hcid(i);
173 if (!sysconf.hcid[i]) continue; //unknown co processor
174
175 m->bus_mcp55b[0] = (sysconf.pci1234[1]>>16) & 0xff;
176 m->bus_mcp55b[1] = m->bus_mcp55b[0]+1; //fake pci
177
178 for(i=2; i<8;i++) {
179 dev = dev_find_slot(m->bus_mcp55b[0], PCI_DEVFN(m->sbdnb + 0x0a + i - 2 , 0));
180 if (dev) {
181 m->bus_mcp55b[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
182 }
183 else {
184 printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55b[0], m->sbdnb + 0x0a + i - 2 );
185 }
186 }
187 }
188
189
190/*I/O APICs: APIC ID Version State Address*/
191#if CONFIG_LOGICAL_CPUS==1
192 apicid_base = get_apicid_base(2);
193#else
194 apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
195#endif
196 m->apicid_mcp55 = apicid_base+0;
197 m->apicid_mcp55b = apicid_base+1;
198
199}