| Martin Roth | 5856240 | 2015-10-11 10:36:26 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 coresystems GmbH |
| 5 | * Copyright (C) 2011 Google Inc |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| Martin Roth | 5856240 | 2015-10-11 10:36:26 +0200 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | typedef struct { |
| 18 | /* Miscellaneous */ |
| 19 | u16 osys; /* 0x00 - Operating System */ |
| 20 | u8 smif; /* 0x02 - SMI function call ("TRAP") */ |
| 21 | u8 prm0; /* 0x03 - SMI function call parameter */ |
| 22 | u8 prm1; /* 0x04 - SMI function call parameter */ |
| 23 | u8 scif; /* 0x05 - SCI function call (via _L00) */ |
| 24 | u8 prm2; /* 0x06 - SCI function call parameter */ |
| 25 | u8 prm3; /* 0x07 - SCI function call parameter */ |
| 26 | u8 lckf; /* 0x08 - Global Lock function for EC */ |
| 27 | u8 prm4; /* 0x09 - Lock function parameter */ |
| 28 | u8 prm5; /* 0x0a - Lock function parameter */ |
| 29 | u32 p80d; /* 0x0b - Debug port (IO 0x80) value */ |
| 30 | u8 lids; /* 0x0f - LID state (open = 1) */ |
| 31 | u8 pwrs; /* 0x10 - Power state (AC = 1) */ |
| 32 | /* Thermal policy */ |
| 33 | u8 tlvl; /* 0x11 - Throttle Level Limit */ |
| 34 | u8 flvl; /* 0x12 - Current FAN Level */ |
| 35 | u8 tcrt; /* 0x13 - Critical Threshold */ |
| 36 | u8 tpsv; /* 0x14 - Passive Threshold */ |
| 37 | u8 tmax; /* 0x15 - CPU Tj_max */ |
| 38 | u8 f0of; /* 0x16 - FAN 0 OFF Threshold */ |
| 39 | u8 f0on; /* 0x17 - FAN 0 ON Threshold */ |
| 40 | u8 f0pw; /* 0x18 - FAN 0 PWM value */ |
| 41 | u8 f1of; /* 0x19 - FAN 1 OFF Threshold */ |
| 42 | u8 f1on; /* 0x1a - FAN 1 ON Threshold */ |
| 43 | u8 f1pw; /* 0x1b - FAN 1 PWM value */ |
| 44 | u8 f2of; /* 0x1c - FAN 2 OFF Threshold */ |
| 45 | u8 f2on; /* 0x1d - FAN 2 ON Threshold */ |
| 46 | u8 f2pw; /* 0x1e - FAN 2 PWM value */ |
| 47 | u8 f3of; /* 0x1f - FAN 3 OFF Threshold */ |
| 48 | u8 f3on; /* 0x20 - FAN 3 ON Threshold */ |
| 49 | u8 f3pw; /* 0x21 - FAN 3 PWM value */ |
| 50 | u8 f4of; /* 0x22 - FAN 4 OFF Threshold */ |
| 51 | u8 f4on; /* 0x23 - FAN 4 ON Threshold */ |
| 52 | u8 f4pw; /* 0x24 - FAN 4 PWM value */ |
| 53 | u8 tmps; /* 0x25 - Temperature Sensor ID */ |
| 54 | u8 rsvd3[2]; |
| 55 | /* Processor Identification */ |
| 56 | u8 apic; /* 0x28 - APIC enabled */ |
| 57 | u8 mpen; /* 0x29 - MP capable/enabled */ |
| 58 | u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */ |
| 59 | u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */ |
| 60 | u8 ppcm; /* 0x2c - Max. PPC state */ |
| 61 | u8 pcnt; /* 0x2d - Processor Count */ |
| 62 | u8 rsvd4[4]; |
| 63 | /* Super I/O & CMOS config */ |
| 64 | u8 natp; /* 0x32 - SIO type */ |
| 65 | u8 s5u0; /* 0x33 - Enable USB0 in S5 */ |
| 66 | u8 s5u1; /* 0x34 - Enable USB1 in S5 */ |
| 67 | u8 s3u0; /* 0x35 - Enable USB0 in S3 */ |
| 68 | u8 s3u1; /* 0x36 - Enable USB1 in S3 */ |
| 69 | u8 s33g; /* 0x37 - Enable S3 in 3G */ |
| 70 | u32 obsolete_cmem; /* 0x38 - CBMEM TOC */ |
| 71 | /* Integrated Graphics Device */ |
| 72 | u8 igds; /* 0x3c - IGD state */ |
| 73 | u8 tlst; /* 0x3d - Display Toggle List Pointer */ |
| 74 | u8 cadl; /* 0x3e - currently attached devices */ |
| 75 | u8 padl; /* 0x3f - previously attached devices */ |
| 76 | u16 cste; /* 0x40 - current display state */ |
| 77 | u16 nste; /* 0x42 - next display state */ |
| 78 | u16 sste; /* 0x44 - set display state */ |
| 79 | u8 ndid; /* 0x46 - number of device ids */ |
| 80 | u32 did[5]; /* 0x47 - 5b device id 1..5 */ |
| 81 | u8 rsvd5[0x9]; |
| 82 | /* Backlight Control */ |
| 83 | u8 blcs; /* 0x64 - Backlight Control possible */ |
| 84 | u8 brtl; |
| 85 | u8 odds; |
| 86 | u8 rsvd6[0x7]; |
| 87 | /* Ambient Light Sensors*/ |
| 88 | u8 alse; /* 0x6e - ALS enable */ |
| 89 | u8 alaf; |
| 90 | u8 llow; |
| 91 | u8 lhih; |
| 92 | u8 rsvd7[0x6]; |
| 93 | /* Extended Mobile Access */ |
| 94 | u8 emae; /* 0x78 - EMA enable */ |
| 95 | u16 emap; /* 0x79 - EMA pointer */ |
| 96 | u16 emal; /* 0x7a - EMA Length */ |
| 97 | u8 rsvd8[0x5]; |
| 98 | /* MEF */ |
| 99 | u8 mefe; /* 0x82 - MEF enable */ |
| 100 | u8 rsvd9[0x9]; |
| 101 | /* TPM support */ |
| 102 | u8 tpmp; /* 0x8c - TPM */ |
| 103 | u8 tpme; |
| 104 | u8 rsvd10[8]; |
| 105 | /* SATA */ |
| 106 | u8 gtf0[7]; /* 0x96 - GTF task file buffer for port 0 */ |
| 107 | u8 gtf1[7]; |
| 108 | u8 gtf2[7]; |
| 109 | u8 idem; |
| 110 | u8 idet; |
| 111 | u8 rsvd11[7]; |
| 112 | /* IGD OpRegion (not implemented yet) */ |
| 113 | u32 aslb; /* 0xb4 - IGD OpRegion Base Address */ |
| 114 | u8 ibtt; /* 0xb8 - IGD boot type */ |
| 115 | u8 ipat; /* 0xb9 - IGD panel type */ |
| 116 | u8 itvf; /* 0xba - IGD TV format */ |
| 117 | u8 itvm; /* 0xbb - IGD TV minor format */ |
| 118 | u8 ipsc; /* 0xbc - IGD Panel Scaling */ |
| 119 | u8 iblc; /* 0xbd - IGD BLC configuration */ |
| 120 | u8 ibia; /* 0xbe - IGD BIA configuration */ |
| 121 | u8 issc; /* 0xbf - IGD SSC configuration */ |
| 122 | u8 i409; /* 0xc0 - IGD 0409 modified settings */ |
| 123 | u8 i509; /* 0xc1 - IGD 0509 modified settings */ |
| 124 | u8 i609; /* 0xc2 - IGD 0609 modified settings */ |
| 125 | u8 i709; /* 0xc3 - IGD 0709 modified settings */ |
| 126 | u8 idmm; /* 0xc4 - IGD Power Conservation */ |
| 127 | u8 idms; /* 0xc5 - IGD DVMT memory size */ |
| 128 | u8 if1e; /* 0xc6 - IGD Function 1 Enable */ |
| 129 | u8 hvco; /* 0xc7 - IGD HPLL VCO */ |
| 130 | u32 nxd[8]; /* 0xc8 - IGD next state DIDx for _DGS */ |
| 131 | u8 isci; /* 0xe8 - IGD SMI/SCI mode (0: SCI) */ |
| 132 | u8 pavp; /* 0xe9 - IGD PAVP data */ |
| 133 | u8 rsvd12; /* 0xea - rsvd */ |
| 134 | u8 oscc; /* 0xeb - PCIe OSC control */ |
| 135 | u8 npce; /* 0xec - native pcie support */ |
| 136 | u8 plfl; /* 0xed - platform flavor */ |
| 137 | u8 brev; /* 0xee - board revision */ |
| 138 | u8 dpbm; /* 0xef - digital port b mode */ |
| 139 | u8 dpcm; /* 0xf0 - digital port c mode */ |
| 140 | u8 dpdm; /* 0xf1 - digital port c mode */ |
| 141 | u8 alfp; /* 0xf2 - active lfp */ |
| 142 | u8 imon; /* 0xf3 - current graphics turbo imon value */ |
| 143 | u8 mmio; /* 0xf4 - 64bit mmio support */ |
| 144 | u8 rsvd13[11]; /* 0xf5 - rsvd */ |
| 145 | |
| Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 146 | } __packed global_nvs_t; |
| Martin Roth | 5856240 | 2015-10-11 10:36:26 +0200 | [diff] [blame] | 147 | |
| 148 | void acpi_create_gnvs(global_nvs_t *gnvs); |
| 149 | #ifdef __SMM__ |
| 150 | /* Used in SMM to find the ACPI GNVS address */ |
| 151 | global_nvs_t *smm_get_gnvs(void); |
| 152 | #endif |