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Uwe Hermann1ec50942008-11-11 21:10:07 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
Kerry Shehc55f5a02012-02-07 20:32:37 +08005 * Copyright (C) 2012 Advanced Micro Devices, Inc.
Uwe Hermann1ec50942008-11-11 21:10:07 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Uwe Hermann1ec50942008-11-11 21:10:07 +000016 */
17
Edward O'Callaghanffe460d2014-04-27 22:51:40 +100018#ifndef SUPERIO_WINBOND_W83627DHG_H
19#define SUPERIO_WINBOND_W83627DHG_H
Uwe Hermann7fa08192010-11-08 20:55:24 +000020
Uwe Hermann1ec50942008-11-11 21:10:07 +000021#define W83627DHG_FDC 0 /* Floppy */
22#define W83627DHG_PP 1 /* Parallel port */
23#define W83627DHG_SP1 2 /* Com1 */
24#define W83627DHG_SP2 3 /* Com2 */
Uwe Hermann3a4ed152010-12-05 22:36:14 +000025#define W83627DHG_KBC 5 /* PS/2 keyboard & mouse */
Uwe Hermann1ec50942008-11-11 21:10:07 +000026#define W83627DHG_SPI 6 /* Serial peripheral interface */
Uwe Hermann1ec50942008-11-11 21:10:07 +000027#define W83627DHG_WDTO_PLED 8 /* WDTO#, PLED */
Uwe Hermann1ec50942008-11-11 21:10:07 +000028#define W83627DHG_ACPI 10 /* ACPI */
29#define W83627DHG_HWM 11 /* Hardware monitor */
30#define W83627DHG_PECI_SST 12 /* PECI, SST */
Uwe Hermann7fa08192010-11-08 20:55:24 +000031
Uwe Hermann3a4ed152010-12-05 22:36:14 +000032/* The following are handled using "virtual LDNs" (hence the _V suffix). */
33#define W83627DHG_GPIO6_V 7 /* GPIO6 */
34#define W83627DHG_GPIO2345_V 9 /* GPIO2, GPIO3, GPIO4, GPIO5 */
35
36/*
37 * Virtual devices sharing the enables are encoded as follows:
38 * VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN
39 */
40
41/* GPIO6 has bit 3 as enable (instead of bit 0 as usual). */
42#define W83627DHG_GPIO6 ((3 << 8) | W83627DHG_GPIO6_V)
43
44#define W83627DHG_GPIO2 ((0 << 8) | W83627DHG_GPIO2345_V)
45#define W83627DHG_GPIO3 ((1 << 8) | W83627DHG_GPIO2345_V)
46#define W83627DHG_GPIO4 ((2 << 8) | W83627DHG_GPIO2345_V)
47#define W83627DHG_GPIO5 ((3 << 8) | W83627DHG_GPIO2345_V)
48
49/* Note: There is no GPIO1 on the W83627DHG as per datasheet. */
50
Edward O'Callaghan85836c22014-07-09 20:26:25 +100051void pnp_enter_ext_func_mode(pnp_devfn_t dev);
52void pnp_exit_ext_func_mode(pnp_devfn_t dev);
53void w83627dhg_enable_i2c(pnp_devfn_t dev);
54void w83627dhg_set_clksel_48(pnp_devfn_t dev);
Kerry Shehc55f5a02012-02-07 20:32:37 +080055
Edward O'Callaghanffe460d2014-04-27 22:51:40 +100056#endif /* SUPERIO_WINBOND_W83627DHG_H */