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Stefan Reinauer2e73e192010-01-17 13:52:50 +00001/*
Uwe Hermannc70e9fc2010-02-15 23:10:19 +00002 * This file is part of the coreboot project.
Stefan Reinauer2e73e192010-01-17 13:52:50 +00003 *
Uwe Hermannc70e9fc2010-02-15 23:10:19 +00004 * Copyright (C) 2008-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Stefan Reinauer2e73e192010-01-17 13:52:50 +000010 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Uwe Hermannc70e9fc2010-02-15 23:10:19 +000018 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Stefan Reinauer2e73e192010-01-17 13:52:50 +000019 */
20
21#include <arch/io.h>
22#include <device/device.h>
23#include <device/pci.h>
24#include <device/pci_ops.h>
25#include <device/pci_ids.h>
26#include <console/console.h>
27#include <device/cardbus.h>
28#include "pci7420.h"
29#include "chip.h"
30
31#ifdef ODD_IRQ_FIXUP
32static int cardbus_count = 0;
33#endif
34
35static void pci7420_cardbus_init(device_t dev)
36{
37 u8 reg8;
38 u16 reg16;
39 u32 reg32;
40
41 struct southbridge_ti_pci7420_config *config = dev->chip_info;
42 int smartcard_enabled = 0;
43
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000044 printk(BIOS_DEBUG, "TI PCI7420/7620 init\n");
Stefan Reinauer2e73e192010-01-17 13:52:50 +000045
46 if (!config) {
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000047 printk(BIOS_DEBUG, "PCI7420: No configuration found.\n");
Stefan Reinauer2e73e192010-01-17 13:52:50 +000048 } else {
49 smartcard_enabled = config->smartcard_enabled;
50 }
51
52 reg32 = pci_read_config32(dev, SYSCTL);
53 reg32 |= RIMUX;
54 pci_write_config32(dev, SYSCTL, reg32);
55
56 /* Enable SPKROUT */
57 reg8 = pci_read_config8(dev, CARDCTL);
58 reg8 |= SPKROUTEN;
59 pci_write_config8(dev, CARDCTL, reg8);
60
61 /* Power switch select and FM disable */
62 reg16 = pci_read_config16(dev, GENCTL);
63 reg16 |= P12V_SW_SEL; // 12V capable power switch
64 if (smartcard_enabled == 0)
65 reg16 |= DISABLE_FM;
66 pci_write_config16(dev, GENCTL, reg16);
67
68 /* Multifunction routing status */
69 pci_write_config32(dev, MFUNC, 0x018a1b22);
70
71#ifdef ODD_IRQ_FIXUP
72 /* This is a workaround for buggy kernels. This should
73 * probably be read from the device tree, but as long
74 * as only one mainboard is using this bridge it does
75 * not matter.
76 *
77 * Basically what we do here is assign INTA to the first
78 * cardbus controller, and INTB to the second one. We know
79 * there are only two of them.
80 */
81 pci_write_config8(dev, PCI_INTERRUPT_PIN, cardbus_count);
82 cardbus_count++;
83#endif
84}
85
Stefan Reinauer53b0ea42010-03-22 11:50:52 +000086static void pci7420_cardbus_read_resources(device_t dev)
Stefan Reinauer2e73e192010-01-17 13:52:50 +000087{
88 cardbus_read_resources(dev);
89}
90
Stefan Reinauer53b0ea42010-03-22 11:50:52 +000091static void pci7420_cardbus_set_resources(device_t dev)
Stefan Reinauer2e73e192010-01-17 13:52:50 +000092{
Paul Menzeld0cdcae2014-08-08 15:24:31 +020093 printk(BIOS_DEBUG, "%s In set resources\n",dev_path(dev));
Stefan Reinauer2e73e192010-01-17 13:52:50 +000094
95 pci_dev_set_resources(dev);
96
Paul Menzeld0cdcae2014-08-08 15:24:31 +020097 printk(BIOS_DEBUG, "%s done set resources\n",dev_path(dev));
Stefan Reinauer2e73e192010-01-17 13:52:50 +000098}
99
100static struct device_operations ti_pci7420_ops = {
101 .read_resources = pci7420_cardbus_read_resources,
102 .set_resources = pci7420_cardbus_set_resources,
103 .enable_resources = cardbus_enable_resources,
104 .init = pci7420_cardbus_init,
Myles Watson84e8e452010-06-07 17:12:57 +0000105 .scan_bus = pci_scan_bridge,
Stefan Reinauer2e73e192010-01-17 13:52:50 +0000106};
107
108static const struct pci_driver ti_pci7420_driver __pci_driver = {
109 .ops = &ti_pci7420_ops,
110 .vendor = 0x104c,
111 .device = 0xac8e,
112};
113
114static const struct pci_driver ti_pci7620_driver __pci_driver = {
115 .ops = &ti_pci7420_ops,
116 .vendor = 0x104c,
117 .device = 0xac8d,
118};
119
120static void ti_pci7420_enable_dev(device_t dev)
121{
122 /* Nothing here yet */
123}
124
125struct chip_operations southbridge_ti_pci7420_ops = {
126 CHIP_NAME("Texas Instruments PCI7420/7620 Cardbus Controller")
127 .enable_dev = ti_pci7420_enable_dev,
128};