blob: 9e00c0ec47c3f75ff63cda7bee6b8579726176ce [file] [log] [blame]
Jordan Crousef6145c32008-03-19 23:56:58 +00001/*
2 * This file is part of the libpayload project.
3 *
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
Uwe Hermannfad8c2b2008-04-11 18:01:50 +000030#ifndef _COREBOOT_TABLES_H
31#define _COREBOOT_TABLES_H
Jordan Crousef6145c32008-03-19 23:56:58 +000032
33#include <arch/types.h>
Gabe Black54c800a2012-08-28 16:31:09 -070034#include <ipchksum.h>
Jordan Crousef6145c32008-03-19 23:56:58 +000035
36struct cbuint64 {
Uwe Hermannfad8c2b2008-04-11 18:01:50 +000037 u32 lo;
38 u32 hi;
Jordan Crousef6145c32008-03-19 23:56:58 +000039};
40
41struct cb_header {
Uwe Hermannfad8c2b2008-04-11 18:01:50 +000042 u8 signature[4];
43 u32 header_bytes;
44 u32 header_checksum;
45 u32 table_bytes;
46 u32 table_checksum;
47 u32 table_entries;
Jordan Crousef6145c32008-03-19 23:56:58 +000048};
49
50struct cb_record {
Uwe Hermannfad8c2b2008-04-11 18:01:50 +000051 u32 tag;
52 u32 size;
Jordan Crousef6145c32008-03-19 23:56:58 +000053};
54
55#define CB_TAG_UNUSED 0x0000
56#define CB_TAG_MEMORY 0x0001
57
58struct cb_memory_range {
59 struct cbuint64 start;
60 struct cbuint64 size;
Uwe Hermannfad8c2b2008-04-11 18:01:50 +000061 u32 type;
Jordan Crousef6145c32008-03-19 23:56:58 +000062};
63
Stefan Reinauerd1bc3312011-06-22 16:39:19 -070064#define CB_MEM_RAM 1
65#define CB_MEM_RESERVED 2
66#define CB_MEM_ACPI 3
67#define CB_MEM_NVS 4
68#define CB_MEM_UNUSABLE 5
69#define CB_MEM_VENDOR_RSVD 6
70#define CB_MEM_TABLE 16
Jordan Crousef6145c32008-03-19 23:56:58 +000071
72struct cb_memory {
Uwe Hermannfad8c2b2008-04-11 18:01:50 +000073 u32 tag;
74 u32 size;
Jordan Crousef6145c32008-03-19 23:56:58 +000075 struct cb_memory_range map[0];
76};
77
78#define CB_TAG_HWRPB 0x0002
79
80struct cb_hwrpb {
Uwe Hermannfad8c2b2008-04-11 18:01:50 +000081 u32 tag;
82 u32 size;
83 u64 hwrpb;
Jordan Crousef6145c32008-03-19 23:56:58 +000084};
85
86#define CB_TAG_MAINBOARD 0x0003
87
88struct cb_mainboard {
Uwe Hermannfad8c2b2008-04-11 18:01:50 +000089 u32 tag;
90 u32 size;
91 u8 vendor_idx;
92 u8 part_number_idx;
93 u8 strings[0];
Jordan Crousef6145c32008-03-19 23:56:58 +000094};
95
96#define CB_TAG_VERSION 0x0004
97#define CB_TAG_EXTRA_VERSION 0x0005
98#define CB_TAG_BUILD 0x0006
99#define CB_TAG_COMPILE_TIME 0x0007
100#define CB_TAG_COMPILE_BY 0x0008
101#define CB_TAG_COMPILE_HOST 0x0009
102#define CB_TAG_COMPILE_DOMAIN 0x000a
103#define CB_TAG_COMPILER 0x000b
104#define CB_TAG_LINKER 0x000c
105#define CB_TAG_ASSEMBLER 0x000d
106
107struct cb_string {
Uwe Hermannfad8c2b2008-04-11 18:01:50 +0000108 u32 tag;
109 u32 size;
110 u8 string[0];
Jordan Crousef6145c32008-03-19 23:56:58 +0000111};
112
113#define CB_TAG_SERIAL 0x000f
114
115struct cb_serial {
Uwe Hermannfad8c2b2008-04-11 18:01:50 +0000116 u32 tag;
117 u32 size;
Stefan Reinauerd1bc3312011-06-22 16:39:19 -0700118#define CB_SERIAL_TYPE_IO_MAPPED 1
119#define CB_SERIAL_TYPE_MEMORY_MAPPED 2
120 u32 type;
121 u32 baseaddr;
122 u32 baud;
Vadim Bendebury6cc5e522015-01-09 16:54:19 -0800123 u32 regwidth;
Lee Leahyf92a98c2016-05-04 11:59:19 -0700124
125 /* Crystal or input frequency to the chip containing the UART.
126 * Provide the board specific details to allow the payload to
127 * initialize the chip containing the UART and make independent
128 * decisions as to which dividers to select and their values
129 * to eventually arrive at the desired console baud-rate. */
130 u32 input_hertz;
131
132 /* UART PCI address: bus, device, function
133 * 1 << 31 - Valid bit, PCI UART in use
134 * Bus << 20
135 * Device << 15
136 * Function << 12
137 */
138 u32 uart_pci_addr;
Jordan Crousef6145c32008-03-19 23:56:58 +0000139};
140
141#define CB_TAG_CONSOLE 0x00010
142
143struct cb_console {
Uwe Hermannfad8c2b2008-04-11 18:01:50 +0000144 u32 tag;
145 u32 size;
146 u16 type;
Jordan Crousef6145c32008-03-19 23:56:58 +0000147};
148
149#define CB_TAG_CONSOLE_SERIAL8250 0
Stefan Reinauerabc0c852010-11-22 08:09:50 +0000150#define CB_TAG_CONSOLE_VGA 1 // OBSOLETE
151#define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE
Stefan Reinauer5ae31752013-06-19 13:47:46 -0700152#define CB_TAG_CONSOLE_LOGBUF 3 // OBSOLETE
Stefan Reinauerabc0c852010-11-22 08:09:50 +0000153#define CB_TAG_CONSOLE_SROM 4 // OBSOLETE
Jordan Crousef6145c32008-03-19 23:56:58 +0000154#define CB_TAG_CONSOLE_EHCI 5
155
Stefan Reinauer5f7d5062009-03-17 16:41:01 +0000156#define CB_TAG_FORWARD 0x00011
157
158struct cb_forward {
159 u32 tag;
160 u32 size;
161 u64 forward;
162};
163
Stefan Reinauerb7002542010-03-25 18:56:26 +0000164#define CB_TAG_FRAMEBUFFER 0x0012
165struct cb_framebuffer {
166 u32 tag;
167 u32 size;
168
169 u64 physical_address;
170 u32 x_resolution;
171 u32 y_resolution;
172 u32 bytes_per_line;
173 u8 bits_per_pixel;
Stefan Tauner3509ad32013-06-25 19:25:46 +0200174 u8 red_mask_pos;
Stefan Reinauerb7002542010-03-25 18:56:26 +0000175 u8 red_mask_size;
176 u8 green_mask_pos;
177 u8 green_mask_size;
178 u8 blue_mask_pos;
179 u8 blue_mask_size;
180 u8 reserved_mask_pos;
181 u8 reserved_mask_size;
182};
183
Gabe Blackd3890cc2012-03-11 01:57:53 -0800184#define CB_TAG_GPIO 0x0013
Gabe Black025667f2012-10-01 17:54:03 -0700185#define CB_GPIO_ACTIVE_LOW 0
186#define CB_GPIO_ACTIVE_HIGH 1
187#define CB_GPIO_MAX_NAME_LENGTH 16
Gabe Blackd3890cc2012-03-11 01:57:53 -0800188struct cb_gpio {
189 u32 port;
190 u32 polarity;
191 u32 value;
Gabe Black025667f2012-10-01 17:54:03 -0700192 u8 name[CB_GPIO_MAX_NAME_LENGTH];
Gabe Blackd3890cc2012-03-11 01:57:53 -0800193};
194
195struct cb_gpios {
196 u32 tag;
197 u32 size;
198
199 u32 count;
200 struct cb_gpio gpios[0];
201};
202
Julius Werner1f5487a2013-08-27 15:38:54 -0700203#define CB_TAG_VDAT 0x0015
204#define CB_TAG_VBNV 0x0019
205#define CB_TAG_VBOOT_HANDOFF 0x0020
Julius Wernerb8fad3d2013-08-27 15:48:32 -0700206#define CB_TAG_DMA 0x0022
Furquan Shaikh6b322cc2014-11-08 17:19:31 -0800207#define CB_TAG_RAM_OOPS 0x0023
Furquan Shaikh3cec8712015-06-10 20:38:48 -0700208#define CB_TAG_MTC 0x002b
Kan Yanb6cadc62017-01-05 19:42:53 -0800209#define CB_TAG_VPD 0x002c
Julius Werner1f5487a2013-08-27 15:38:54 -0700210struct lb_range {
Gabe Blackd3890cc2012-03-11 01:57:53 -0800211 uint32_t tag;
Julius Werner1f5487a2013-08-27 15:38:54 -0700212 uint32_t size;
213 uint64_t range_start;
214 uint32_t range_size;
Gabe Blackd3890cc2012-03-11 01:57:53 -0800215};
216
217#define CB_TAG_TIMESTAMPS 0x0016
218#define CB_TAG_CBMEM_CONSOLE 0x0017
219#define CB_TAG_MRC_CACHE 0x0018
Duncan Laurief517c442013-12-12 10:43:58 -0800220#define CB_TAG_ACPI_GNVS 0x0024
Vadim Bendebury522f9c62014-10-24 15:14:55 -0700221#define CB_TAG_WIFI_CALIBRATION 0x0027
Gabe Blackd3890cc2012-03-11 01:57:53 -0800222struct cb_cbmem_tab {
223 uint32_t tag;
224 uint32_t size;
Stefan Reinauer642b1db72013-04-18 18:01:34 -0700225 uint64_t cbmem_tab;
Gabe Blackd3890cc2012-03-11 01:57:53 -0800226};
227
Vadim Bendebury6051e832014-07-29 17:51:29 -0700228#define CB_TAG_BOARD_ID 0x0025
229struct cb_board_id {
230 uint32_t tag;
231 uint32_t size;
232 /* Board ID as retrieved from the board revision GPIOs. */
233 uint32_t board_id;
234};
235
Aaron Durbina09760e2013-03-26 13:34:37 -0500236#define CB_TAG_X86_ROM_MTRR 0x0021
237struct cb_x86_rom_mtrr {
238 uint32_t tag;
239 uint32_t size;
240 /* The variable range MTRR index covering the ROM. If one wants to
241 * enable caching the ROM, the variable MTRR needs to be set to
242 * write-protect. To disable the caching after enabling set the
243 * type to uncacheable. */
244 uint32_t index;
245};
246
Vadim Bendeburyb7d74122014-09-22 19:36:28 -0700247#define CB_TAG_MAC_ADDRS 0x0026
248struct mac_address {
249 uint8_t mac_addr[6];
250 uint8_t pad[2]; /* Pad it to 8 bytes to keep it simple. */
251};
252
253struct cb_macs {
254 uint32_t tag;
255 uint32_t size;
256 uint32_t count;
257 struct mac_address mac_addrs[0];
258};
Aaron Durbina09760e2013-03-26 13:34:37 -0500259
David Hendricks272afe82014-11-20 13:59:45 -0800260#define CB_TAG_RAM_CODE 0x0028
261struct cb_ram_code {
262 uint32_t tag;
263 uint32_t size;
264 uint32_t ram_code;
265};
266
Dan Ehrenberg6addd402015-01-08 10:29:19 -0800267#define CB_TAG_SPI_FLASH 0x0029
268struct cb_spi_flash {
269 uint32_t tag;
270 uint32_t size;
271 uint32_t flash_size;
272 uint32_t sector_size;
273 uint32_t erase_cmd;
274};
275
Patrick Georgif61b35d2015-07-14 17:15:24 +0100276#define CB_TAG_BOOT_MEDIA_PARAMS 0x0030
277struct cb_boot_media_params {
278 uint32_t tag;
279 uint32_t size;
280 /* offsets are relative to start of boot media */
281 uint64_t fmap_offset;
282 uint64_t cbfs_offset;
283 uint64_t cbfs_size;
284 uint64_t boot_media_size;
285};
286
Aaron Durbin152e5a02016-02-10 11:01:49 -0600287#define CB_TAG_TSC_INFO 0x0032
288struct cb_tsc_info {
289 uint32_t tag;
290 uint32_t size;
291
292 uint32_t freq_khz;
293};
294
Stephen Barberda262a62015-03-11 15:48:08 -0700295#define CB_TAG_SERIALNO 0x002a
296#define CB_MAX_SERIALNO_LENGTH 32
297
Stefan Reinauer95a6e1c2008-08-07 10:21:05 +0000298#define CB_TAG_CMOS_OPTION_TABLE 0x00c8
299struct cb_cmos_option_table {
300 u32 tag;
301 u32 size;
302 u32 header_length;
303};
304
305#define CB_TAG_OPTION 0x00c9
Gabe Blackd94512e2012-10-01 18:05:50 -0700306#define CB_CMOS_MAX_NAME_LENGTH 32
Stefan Reinauer95a6e1c2008-08-07 10:21:05 +0000307struct cb_cmos_entries {
308 u32 tag;
309 u32 size;
310 u32 bit;
311 u32 length;
312 u32 config;
313 u32 config_id;
Gabe Blackd94512e2012-10-01 18:05:50 -0700314 u8 name[CB_CMOS_MAX_NAME_LENGTH];
Stefan Reinauer95a6e1c2008-08-07 10:21:05 +0000315};
316
317
318#define CB_TAG_OPTION_ENUM 0x00ca
Gabe Blackd94512e2012-10-01 18:05:50 -0700319#define CB_CMOS_MAX_TEXT_LENGTH 32
Stefan Reinauer95a6e1c2008-08-07 10:21:05 +0000320struct cb_cmos_enums {
321 u32 tag;
322 u32 size;
323 u32 config_id;
324 u32 value;
Gabe Blackd94512e2012-10-01 18:05:50 -0700325 u8 text[CB_CMOS_MAX_TEXT_LENGTH];
Stefan Reinauer95a6e1c2008-08-07 10:21:05 +0000326};
327
328#define CB_TAG_OPTION_DEFAULTS 0x00cb
Gabe Blackd94512e2012-10-01 18:05:50 -0700329#define CB_CMOS_IMAGE_BUFFER_SIZE 128
Stefan Reinauer95a6e1c2008-08-07 10:21:05 +0000330struct cb_cmos_defaults {
331 u32 tag;
332 u32 size;
333 u32 name_length;
Gabe Blackd94512e2012-10-01 18:05:50 -0700334 u8 name[CB_CMOS_MAX_NAME_LENGTH];
335 u8 default_set[CB_CMOS_IMAGE_BUFFER_SIZE];
Stefan Reinauer95a6e1c2008-08-07 10:21:05 +0000336};
337
338#define CB_TAG_OPTION_CHECKSUM 0x00cc
Gabe Blackd94512e2012-10-01 18:05:50 -0700339#define CB_CHECKSUM_NONE 0
340#define CB_CHECKSUM_PCBIOS 1
Stefan Reinauer95a6e1c2008-08-07 10:21:05 +0000341struct cb_cmos_checksum {
342 u32 tag;
343 u32 size;
344 u32 range_start;
345 u32 range_end;
346 u32 location;
347 u32 type;
348};
Jordan Crousef6145c32008-03-19 23:56:58 +0000349
Philip Prindeville46404d72011-12-23 17:09:02 -0700350/* Helpful inlines */
351
352static inline u64 cb_unpack64(struct cbuint64 val)
353{
354 return (((u64) val.hi) << 32) | val.lo;
355}
356
Philip Prindevillefe2f6b02011-12-23 17:22:05 -0700357static inline u16 cb_checksum(const void *ptr, unsigned len)
358{
359 return ipchksum(ptr, len);
360}
361
Philip Prindeville9a7c2462011-12-24 22:12:37 -0700362static inline const char *cb_mb_vendor_string(const struct cb_mainboard *cbm)
363{
364 return (char *)(cbm->strings + cbm->vendor_idx);
365}
366
367static inline const char *cb_mb_part_string(const struct cb_mainboard *cbm)
368{
369 return (char *)(cbm->strings + cbm->part_number_idx);
370}
371
Jordan Crousef6145c32008-03-19 23:56:58 +0000372/* Helpful macros */
373
374#define MEM_RANGE_COUNT(_rec) \
Uwe Hermann6a441bf2008-03-20 19:54:59 +0000375 (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))
Jordan Crousef6145c32008-03-19 23:56:58 +0000376
377#define MEM_RANGE_PTR(_rec, _idx) \
Philip Prindeville7d95b3e2011-12-23 17:53:26 -0700378 (void *)(((u8 *) (_rec)) + sizeof(*(_rec)) \
379 + (sizeof((_rec)->map[0]) * (_idx)))
Jordan Crousef6145c32008-03-19 23:56:58 +0000380
Jordan Crousef6145c32008-03-19 23:56:58 +0000381#endif