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Patrick Georgi3c970ee2010-02-19 19:59:03 +00001/*
Stefan Reinauer79253842010-04-13 13:43:35 +00002 * This file is part of the coreboot project.
Patrick Georgi3c970ee2010-02-19 19:59:03 +00003 *
Stefan Reinauer79253842010-04-13 13:43:35 +00004 * Copyright (C) 2006 Advanced Micro Devices, Inc.
5 * Copyright (C) 2008-2010 coresystems GmbH
Patrick Georgi3c970ee2010-02-19 19:59:03 +00006 *
Stefan Reinauer79253842010-04-13 13:43:35 +00007 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010018 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Patrick Georgi3c970ee2010-02-19 19:59:03 +000019 */
20
Stefan Reinauer79253842010-04-13 13:43:35 +000021/* We use ELF as output format. So that we can debug the code in some form. */
Patrick Georgi3c970ee2010-02-19 19:59:03 +000022OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
23OUTPUT_ARCH(i386)
24
Patrick Georgi3c970ee2010-02-19 19:59:03 +000025TARGET(binary)
26SECTIONS
27{
Kyösti Mälkki2172f612012-03-19 19:12:49 +020028 . = ROMSTAGE_BASE;
Patrick Georgi3c970ee2010-02-19 19:59:03 +000029
Patrick Georgi3c970ee2010-02-19 19:59:03 +000030 .rom . : {
31 _rom = .;
32 *(.rom.text);
33 *(.rom.data);
Stefan Reinauer1b4f4352010-03-05 18:03:49 +000034 *(.rodata);
Patrick Georgi3c970ee2010-02-19 19:59:03 +000035 *(.rodata.*);
36 *(.rom.data.*);
37 . = ALIGN(16);
Aaron Durbin716738a2013-05-10 00:33:32 -050038 _car_migrate_start = .;
39 *(.car.migrate);
40 _car_migrate_end = .;
41 . = ALIGN(16);
Patrick Georgi3c970ee2010-02-19 19:59:03 +000042 _erom = .;
43 }
44
Patrick Georgi3c970ee2010-02-19 19:59:03 +000045 /DISCARD/ : {
46 *(.comment)
47 *(.note)
48 *(.comment.*)
49 *(.note.*)
Stefan Reinauer6a113332011-10-14 10:29:21 -070050 *(.eh_frame);
Patrick Georgi3c970ee2010-02-19 19:59:03 +000051 }
Scott Duplichan52ffb2b2011-04-19 01:36:24 +000052
Gabe Black19e7e7d2011-10-01 04:27:32 -070053 . = CONFIG_DCACHE_RAM_BASE;
54 .car.data . (NOLOAD) : {
Aaron Durbin716738a2013-05-10 00:33:32 -050055 _car_data_start = .;
Gabe Black19e7e7d2011-10-01 04:27:32 -070056 *(.car.global_data);
Aaron Durbin716738a2013-05-10 00:33:32 -050057 /* The cbmem_console section comes last to take advantage of
58 * a zero-sized array to hold the memconsole contents that
59 * grows to a bound of CONFIG_CONSOLE_CAR_BUFFER_SIZE. However,
60 * collisions within the cache-as-ram region cannot be
61 * statically checked because the cache-as-ram region usage is
62 * cpu/chipset dependent. */
Gabe Black19e7e7d2011-10-01 04:27:32 -070063 *(.car.cbmem_console);
Aaron Durbin716738a2013-05-10 00:33:32 -050064 _car_data_end = .;
Gabe Black19e7e7d2011-10-01 04:27:32 -070065 }
66
67 _bogus = ASSERT((SIZEOF(.car.data) <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full");
Patrick Georgi3c970ee2010-02-19 19:59:03 +000068}