blob: 901d271656efd8fbb671a9f01a05c090c34a5d53 [file] [log] [blame]
Uwe Hermann8c19f942009-06-24 00:35:07 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
Uwe Hermann8c19f942009-06-24 00:35:07 +000021#include <stdint.h>
22#include <device/pci_def.h>
23#include <arch/io.h>
24#include <device/pnp_def.h>
25#include <arch/romcc_io.h>
26#include <arch/hlt.h>
27#include <stdlib.h>
Patrick Georgi12584e22010-05-08 09:14:51 +000028#include <console/console.h>
Uwe Hermann90950922009-10-04 23:50:06 +000029#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
Uwe Hermann8c19f942009-06-24 00:35:07 +000030#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
31#include "northbridge/intel/i440bx/raminit.h"
32#include "lib/debug.c"
33#include "pc80/udelay_io.c"
34#include "lib/delay.c"
Uwe Hermann8c19f942009-06-24 00:35:07 +000035#include "cpu/x86/bist.h"
Uwe Hermann6f2d20e2010-10-06 19:32:39 +000036void it8671f_48mhz_clkin(void);
Uwe Hermann8c19f942009-06-24 00:35:07 +000037#include "superio/ite/it8671f/it8671f_early_serial.c"
Uwe Hermann6f2d20e2010-10-06 19:32:39 +000038#include <lib.h>
Uwe Hermann8c19f942009-06-24 00:35:07 +000039
40#define SERIAL_DEV PNP_DEV(0x370, IT8671F_SP1)
41
42static inline int spd_read_byte(unsigned int device, unsigned int address)
43{
44 return smbus_read_byte(device, address);
45}
46
47#include "northbridge/intel/i440bx/raminit.c"
48#include "northbridge/intel/i440bx/debug.c"
49
Uwe Hermann6f2d20e2010-10-06 19:32:39 +000050void main(unsigned long bist)
Uwe Hermann8c19f942009-06-24 00:35:07 +000051{
Stefan Reinauer08670622009-06-30 15:17:49 +000052 it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Uwe Hermann8c19f942009-06-24 00:35:07 +000053 uart_init();
54 console_init();
55 report_bist_failure(bist);
Uwe Hermann90950922009-10-04 23:50:06 +000056
57 /* Enable access to the full ROM chip, needed very early by CBFS. */
58 i82371eb_enable_rom(PCI_DEV(0, 7, 0)); /* ISA bridge is 00:07.0. */
59
Uwe Hermann8c19f942009-06-24 00:35:07 +000060 enable_smbus();
Uwe Hermann6f2d20e2010-10-06 19:32:39 +000061 dump_spd_registers();
Uwe Hermann8c19f942009-06-24 00:35:07 +000062 sdram_set_registers();
63 sdram_set_spd_registers();
64 sdram_enable();
Uwe Hermann8c19f942009-06-24 00:35:07 +000065}