Zaolin | a823f9b | 2014-05-06 21:31:45 +0200 | [diff] [blame] | 1 | chip northbridge/intel/sandybridge |
| 2 | |
| 3 | # Enable DisplayPort Hotplug with 6ms pulse |
| 4 | register "gpu_dp_d_hotplug" = "0x06" |
| 5 | |
| 6 | # Enable Panel as LVDS and configure power delays |
| 7 | register "gpu_panel_port_select" = "0" # LVDS |
| 8 | register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms |
| 9 | register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms |
| 10 | register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms |
| 11 | register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms |
| 12 | register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms |
| 13 | |
| 14 | device cpu_cluster 0 on |
| 15 | chip cpu/intel/socket_rPGA988B |
| 16 | device lapic 0 on end |
| 17 | end |
| 18 | chip cpu/intel/model_206ax |
| 19 | # Magic APIC ID to locate this chip |
| 20 | device lapic 0xACAC off end |
| 21 | |
| 22 | # Coordinate with HW_ALL |
| 23 | register "pstate_coord_type" = "0xfe" |
| 24 | |
| 25 | register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) |
| 26 | register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) |
| 27 | register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7) |
| 28 | |
| 29 | register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1) |
| 30 | register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3) |
| 31 | register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7) |
| 32 | end |
| 33 | end |
| 34 | |
| 35 | device domain 0 on |
| 36 | device pci 00.0 on end # host bridge |
| 37 | device pci 02.0 on end # vga controller |
| 38 | |
| 39 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
| 40 | register "pirqa_routing" = "0x8b" |
| 41 | register "pirqb_routing" = "0x8a" |
| 42 | register "pirqc_routing" = "0x8b" |
| 43 | register "pirqd_routing" = "0x8b" |
| 44 | register "pirqe_routing" = "0x80" |
| 45 | register "pirqf_routing" = "0x80" |
| 46 | register "pirqg_routing" = "0x80" |
| 47 | register "pirqh_routing" = "0x80" |
| 48 | |
| 49 | # GPI routing |
| 50 | # 0 No effect (default) |
| 51 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 52 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 53 | register "alt_gp_smi_en" = "0x0000" |
| 54 | register "gpi1_routing" = "2" |
| 55 | register "gpi8_routing" = "2" |
| 56 | |
| 57 | # Enable SATA ports 0 |
| 58 | register "sata_port_map" = "0x1f" |
| 59 | # Set max SATA speed to 6.0 Gb/s |
| 60 | register "sata_interface_speed_support" = "0x3" |
| 61 | |
| 62 | register "gen1_dec" = "0x7c1601" |
| 63 | register "gen2_dec" = "0x0c15e1" |
| 64 | register "gen4_dec" = "0x0c06a1" |
| 65 | |
| 66 | # Enable zero-based linear PCIe root port functions |
| 67 | register "pcie_port_coalesce" = "1" |
| 68 | |
| 69 | device pci 16.0 on end # Management Engine Interface 1 |
| 70 | device pci 16.1 off end |
| 71 | device pci 16.2 off end |
| 72 | device pci 16.3 off end |
| 73 | device pci 19.0 on end # Intel Gigabit Ethernet |
| 74 | device pci 1a.0 on end # USB2 EHCI #2 |
| 75 | device pci 1b.0 on end # High Definition Audio |
| 76 | device pci 1c.0 on end # PCIe Port #1 |
| 77 | device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN |
| 78 | device pci 1c.2 off end |
| 79 | device pci 1c.3 on end # PCIe Port #3 Express Card |
| 80 | device pci 1c.4 on end # PCIe Port #4 MMC/SDXC + IEEE1394 |
| 81 | device pci 1d.0 on end # USB2 EHCI #1 |
| 82 | device pci 1f.0 on #LPC bridge |
| 83 | chip ec/lenovo/pmh7 |
| 84 | device pnp ff.1 on # dummy |
| 85 | end |
| 86 | register "backlight_enable" = "0x01" |
| 87 | register "dock_event_enable" = "0x01" |
| 88 | end |
| 89 | |
| 90 | chip ec/lenovo/h8 |
| 91 | device pnp ff.2 on # dummy |
| 92 | io 0x60 = 0x62 |
| 93 | io 0x62 = 0x66 |
| 94 | io 0x64 = 0x1600 |
| 95 | io 0x66 = 0x1604 |
| 96 | end |
| 97 | |
| 98 | register "config0" = "0xa7" |
| 99 | register "config1" = "0x09" |
| 100 | register "config2" = "0xa0" |
| 101 | register "config3" = "0xc2" |
| 102 | |
| 103 | register "has_keyboard_backlight" = "1" |
| 104 | |
| 105 | register "beepmask0" = "0x00" |
| 106 | register "beepmask1" = "0x86" |
| 107 | register "has_power_management_beeps" = "0" |
| 108 | register "event2_enable" = "0xff" |
| 109 | register "event3_enable" = "0xff" |
| 110 | register "event4_enable" = "0xd0" |
| 111 | register "event5_enable" = "0xfc" |
| 112 | register "event6_enable" = "0x00" |
| 113 | register "event7_enable" = "0x01" |
| 114 | register "event8_enable" = "0x7b" |
| 115 | register "event9_enable" = "0xff" |
| 116 | register "eventa_enable" = "0x01" |
| 117 | register "eventb_enable" = "0x00" |
| 118 | register "eventc_enable" = "0xff" |
| 119 | register "eventd_enable" = "0xff" |
| 120 | register "evente_enable" = "0x0d" |
| 121 | end |
| 122 | end # LPC bridge |
| 123 | device pci 1f.2 on end # SATA Controller 1 |
| 124 | device pci 1f.3 on # SMBUS controller |
| 125 | # eeprom, 8 virtual devices, same chip |
| 126 | chip drivers/i2c/at24rf08c |
| 127 | device i2c 54 on end |
| 128 | device i2c 55 on end |
| 129 | device i2c 56 on end |
| 130 | device i2c 57 on end |
| 131 | device i2c 5c on end |
| 132 | device i2c 5d on end |
| 133 | device i2c 5e on end |
| 134 | device i2c 5f on end |
| 135 | end |
| 136 | end # SMBus |
| 137 | end |
| 138 | end |
| 139 | end |