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Yinghai Luc65bd562007-02-01 00:10:05 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Yinghai Luc65bd562007-02-01 00:10:05 +00003 *
4 * Copyright (C) 2004 Tyan Computer
5 * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
6 * Copyright (C) 2006,2007 AMD
7 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Yinghai Luc65bd562007-02-01 00:10:05 +000018 */
19
20#include <console/console.h>
21#include <device/device.h>
22#include <delay.h>
23#include <device/pci.h>
24#include <device/pci_ids.h>
25#include <device/pci_ops.h>
26#include "mcp55.h"
27
28static void sata_init(struct device *dev)
29{
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000030 u32 dword;
Yinghai Luc65bd562007-02-01 00:10:05 +000031
32 struct southbridge_nvidia_mcp55_config *conf;
33 conf = dev->chip_info;
34
35 dword = pci_read_config32(dev, 0x50);
36 /* Ensure prefetch is disabled */
37 dword &= ~((1 << 15) | (1 << 13));
Elyes HAOUASba28e8d2016-08-31 19:22:16 +020038 if (conf) {
Yinghai Luc65bd562007-02-01 00:10:05 +000039 if (conf->sata1_enable) {
40 /* Enable secondary SATA interface */
41 dword |= (1<<0);
Elyes HAOUAS7f9df962016-08-21 12:06:54 +020042 printk(BIOS_DEBUG, "SATA S\t");
Yinghai Luc65bd562007-02-01 00:10:05 +000043 }
44 if (conf->sata0_enable) {
45 /* Enable primary SATA interface */
46 dword |= (1<<1);
Elyes HAOUAS7f9df962016-08-21 12:06:54 +020047 printk(BIOS_DEBUG, "SATA P\n");
Yinghai Luc65bd562007-02-01 00:10:05 +000048 }
49 } else {
50 dword |= (1<<1) | (1<<0);
Elyes HAOUAS7f9df962016-08-21 12:06:54 +020051 printk(BIOS_DEBUG, "SATA P and S\n");
Yinghai Luc65bd562007-02-01 00:10:05 +000052 }
53
54
55#if 1
56 dword &= ~(0x1f<<24);
57 dword |= (0x15<<24);
58#endif
59 pci_write_config32(dev, 0x50, dword);
60
61 dword = pci_read_config32(dev, 0xf8);
62 dword |= 2;
63 pci_write_config32(dev, 0xf8, dword);
64
65
66}
67
Yinghai Luc65bd562007-02-01 00:10:05 +000068static struct device_operations sata_ops = {
69 .read_resources = pci_dev_read_resources,
70 .set_resources = pci_dev_set_resources,
71 .enable_resources = pci_dev_enable_resources,
72// .enable = mcp55_enable,
73 .init = sata_init,
74 .scan_bus = 0,
Jonathan Kollaschdca8b1b2010-10-29 20:40:06 +000075 .ops_pci = &mcp55_pci_ops,
Yinghai Luc65bd562007-02-01 00:10:05 +000076};
77
Stefan Reinauerf1cf1f72007-10-24 09:08:58 +000078static const struct pci_driver sata0_driver __pci_driver = {
Yinghai Luc65bd562007-02-01 00:10:05 +000079 .ops = &sata_ops,
80 .vendor = PCI_VENDOR_ID_NVIDIA,
81 .device = PCI_DEVICE_ID_NVIDIA_MCP55_SATA0,
82};
83
Stefan Reinauerf1cf1f72007-10-24 09:08:58 +000084static const struct pci_driver sata1_driver __pci_driver = {
Yinghai Luc65bd562007-02-01 00:10:05 +000085 .ops = &sata_ops,
86 .vendor = PCI_VENDOR_ID_NVIDIA,
87 .device = PCI_DEVICE_ID_NVIDIA_MCP55_SATA1,
88};