blob: 69e085984d22e561a95c814a9efd1adbe1080498 [file] [log] [blame]
Yinghai Luc65bd562007-02-01 00:10:05 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Yinghai Luc65bd562007-02-01 00:10:05 +00003 *
4 * Copyright (C) 2004 Tyan Computer
5 * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
6 * Copyright (C) 2006,2007 AMD
7 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Yinghai Luc65bd562007-02-01 00:10:05 +000018 */
19
Kyösti Mälkki1fd75082013-06-11 16:32:01 +030020// Use simple device model for this file even in ramstage
21#define __SIMPLE_DEVICE__
22
Uwe Hermanndc3aa7a2010-09-25 23:47:15 +000023#include <stdint.h>
Patrick Georgi5692c572010-10-05 13:40:31 +000024#include <arch/io.h>
Kyösti Mälkkie2227a22014-02-05 13:02:55 +020025#include <device/pci_ehci.h>
Uwe Hermanndc3aa7a2010-09-25 23:47:15 +000026#include <device/pci_def.h>
Patrick Georgi5692c572010-10-05 13:40:31 +000027#include "mcp55.h"
Uwe Hermanndc3aa7a2010-09-25 23:47:15 +000028
Kyösti Mälkki8101aa62013-08-15 16:27:06 +030029pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
30{
31 return PCI_DEV(0, MCP55_DEVN_BASE + 2, 1); /* USB EHCI */
32}
33
34void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
Yinghai Luc65bd562007-02-01 00:10:05 +000035{
Uwe Hermanndc3aa7a2010-09-25 23:47:15 +000036 u32 dword;
Yinghai Luc65bd562007-02-01 00:10:05 +000037
Uwe Hermanndc3aa7a2010-09-25 23:47:15 +000038 /* Write the port number to 0x74[15:12]. */
39 dword = pci_read_config32(dev, 0x74);
40 dword &= ~(0xf << 12);
41 dword |= (port << 12);
42 pci_write_config32(dev, 0x74, dword);
Yinghai Luc65bd562007-02-01 00:10:05 +000043}