blob: a849ebab923e6be1c8f542af1f36677bde15ff30 [file] [log] [blame]
Yinghai Luc65bd562007-02-01 00:10:05 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Yinghai Luc65bd562007-02-01 00:10:05 +00003 *
4 * Copyright (C) 2004 Tyan Computer
5 * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
6 * Copyright (C) 2006,2007 AMD
7 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Yinghai Luc65bd562007-02-01 00:10:05 +000018 */
19
Arthur Heymans11cf68c2017-02-24 14:37:57 +010020#include <arch/io.h>
21#include <console/console.h>
stepan836ae292010-12-08 05:42:47 +000022#include "smbus.h"
Arthur Heymans11cf68c2017-02-24 14:37:57 +010023#include "mcp55.h"
Yinghai Luc65bd562007-02-01 00:10:05 +000024
25#define SMBUS0_IO_BASE 0x1000
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000026#define SMBUS1_IO_BASE (0x1000 + (1 << 8))
27/* Size: 0x40 */
Yinghai Luc65bd562007-02-01 00:10:05 +000028
Arthur Heymans11cf68c2017-02-24 14:37:57 +010029void enable_smbus(void)
Yinghai Luc65bd562007-02-01 00:10:05 +000030{
Antonello Dettori8126daf2016-09-03 10:45:33 +020031 pci_devfn_t dev;
Yinghai Luc65bd562007-02-01 00:10:05 +000032 dev = pci_locate_device(PCI_ID(0x10de, 0x0368), 0);
Stefan Reinauerd55e26f2010-04-25 13:54:30 +000033
Ward Vandewegef648d612010-11-08 17:41:43 +000034 if (dev == PCI_DEV_INVALID)
35 die("SMBus controller not found\n");
Yinghai Luc65bd562007-02-01 00:10:05 +000036
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000037 /* Set SMBus I/O base. */
Yinghai Luc65bd562007-02-01 00:10:05 +000038 pci_write_config32(dev, 0x20, SMBUS0_IO_BASE | 1);
39 pci_write_config32(dev, 0x24, SMBUS1_IO_BASE | 1);
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000040
41 /* Set SMBus I/O space enable. */
Yinghai Luc65bd562007-02-01 00:10:05 +000042 pci_write_config16(dev, 0x4, 0x01);
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000043
44 /* Clear any lingering errors, so the transaction will run. */
Yinghai Luc65bd562007-02-01 00:10:05 +000045 outb(inb(SMBUS0_IO_BASE + SMBHSTSTAT), SMBUS0_IO_BASE + SMBHSTSTAT);
46 outb(inb(SMBUS1_IO_BASE + SMBHSTSTAT), SMBUS1_IO_BASE + SMBHSTSTAT);
47}
48
Arthur Heymans11cf68c2017-02-24 14:37:57 +010049int smbus_recv_byte(unsigned device)
Yinghai Luc65bd562007-02-01 00:10:05 +000050{
51 return do_smbus_recv_byte(SMBUS0_IO_BASE, device);
52}
Stefan Reinauerd55e26f2010-04-25 13:54:30 +000053
Arthur Heymans11cf68c2017-02-24 14:37:57 +010054int smbus_send_byte(unsigned device, unsigned char val)
Yinghai Luc65bd562007-02-01 00:10:05 +000055{
56 return do_smbus_send_byte(SMBUS0_IO_BASE, device, val);
57}
Stefan Reinauerd55e26f2010-04-25 13:54:30 +000058
Arthur Heymans11cf68c2017-02-24 14:37:57 +010059int smbus_read_byte(unsigned device, unsigned address)
Yinghai Luc65bd562007-02-01 00:10:05 +000060{
61 return do_smbus_read_byte(SMBUS0_IO_BASE, device, address);
62}
Stefan Reinauerd55e26f2010-04-25 13:54:30 +000063
Arthur Heymans11cf68c2017-02-24 14:37:57 +010064int smbus_write_byte(unsigned device, unsigned address,
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000065 unsigned char val)
Yinghai Luc65bd562007-02-01 00:10:05 +000066{
67 return do_smbus_write_byte(SMBUS0_IO_BASE, device, address, val);
68}
69
Arthur Heymans11cf68c2017-02-24 14:37:57 +010070int smbusx_recv_byte(unsigned smb_index, unsigned device)
Yinghai Luc65bd562007-02-01 00:10:05 +000071{
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000072 return do_smbus_recv_byte(SMBUS0_IO_BASE + (smb_index << 8), device);
Yinghai Luc65bd562007-02-01 00:10:05 +000073}
Stefan Reinauerd55e26f2010-04-25 13:54:30 +000074
Arthur Heymans11cf68c2017-02-24 14:37:57 +010075int smbusx_send_byte(unsigned smb_index, unsigned device,
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000076 unsigned char val)
Yinghai Luc65bd562007-02-01 00:10:05 +000077{
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000078 return do_smbus_send_byte(SMBUS0_IO_BASE + (smb_index << 8),
79 device, val);
Yinghai Luc65bd562007-02-01 00:10:05 +000080}
Stefan Reinauerd55e26f2010-04-25 13:54:30 +000081
Arthur Heymans11cf68c2017-02-24 14:37:57 +010082int smbusx_read_byte(unsigned smb_index, unsigned device,
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000083 unsigned address)
Yinghai Luc65bd562007-02-01 00:10:05 +000084{
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000085 return do_smbus_read_byte(SMBUS0_IO_BASE + (smb_index << 8),
86 device, address);
Yinghai Luc65bd562007-02-01 00:10:05 +000087}
Stefan Reinauerd55e26f2010-04-25 13:54:30 +000088
Arthur Heymans11cf68c2017-02-24 14:37:57 +010089int smbusx_write_byte(unsigned smb_index, unsigned device,
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000090 unsigned address, unsigned char val)
Yinghai Luc65bd562007-02-01 00:10:05 +000091{
Uwe Hermannc7f0c8f2011-01-04 19:51:33 +000092 return do_smbus_write_byte(SMBUS0_IO_BASE + (smb_index << 8),
93 device, address, val);
Yinghai Luc65bd562007-02-01 00:10:05 +000094}