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review.coreboot.org / coreboot / 69fb7d2a99398a32e30f7a2387338d75aa3845b4 / . / src / arch / x86 / assembly_entry.S
blob: 0d8307bb1f5b6f71bb7e556e969142cf6895474d [file] [log] [blame]
Patrick Georgi11f00792020-03-04 15:10:45 +0100[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
Aaron Durbine581b062015-09-03 11:29:28 -0500[diff] [blame]2
Aaron Durbinaef58652016-04-29 12:34:01 -0500[diff] [blame]3#include <rules.h>
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]4
Aaron Durbinaef58652016-04-29 12:34:01 -0500[diff] [blame]5/*
Arthur Heymansc05b1a62019-11-22 21:01:30 +0100[diff] [blame]6 * This path is for stages that are post bootblock. The gdt is reloaded
7 * to accommodate platforms that are executing out of CAR. In order to
8 * continue with C code execution one needs to set stack pointer and
9 * clear .bss variables that are stage specific.
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]10 */
Felix Heldca928c62020-04-04 01:47:37 +0200[diff] [blame]11
12#if CONFIG(RESET_VECTOR_IN_RAM)
13 #define _STACK_TOP _eearlyram_stack
14#else
15 #define _STACK_TOP _ecar_stack
16#endif
17
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]18.section ".text._start", "ax", @progbits
19.global _start
20_start:
21
Hannah Williamsd3c0c0c2018-04-27 09:09:04 -0700[diff] [blame]22 /* Migrate GDT to this text segment */
23 call gdt_init
24
Felix Heldca928c62020-04-04 01:47:37 +0200[diff] [blame]25 /* reset stack pointer to CAR/EARLYRAM stack */
26 mov $_STACK_TOP, %esp
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]27
Kyösti Mälkki910490f2019-08-22 12:56:22 +0300[diff] [blame]28 /* clear .bss section as it is not shared */
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]29 cld
30 xor %eax, %eax
Kyösti Mälkki910490f2019-08-22 12:56:22 +0300[diff] [blame]31 movl $(_ebss), %ecx
32 movl $(_bss), %edi
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]33 sub %edi, %ecx
Kyösti Mälkki5cbaba42019-08-28 20:52:37 +0300[diff] [blame]34 shrl $2, %ecx
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]35 rep stosl
36
Julius Werner21a40532020-04-21 16:03:53 -0700[diff] [blame]37#if ((ENV_SEPARATE_VERSTAGE && CONFIG(VERSTAGE_DEBUG_SPINLOOP)) \
Julius Wernercd49cce2019-03-05 16:53:33 -0800[diff] [blame]38 || (ENV_ROMSTAGE && CONFIG(ROMSTAGE_DEBUG_SPINLOOP)))
Lee Leahyd131ea32016-06-08 13:40:08 -0700[diff] [blame]39
40 /* Wait for a JTAG debugger to break in and set EBX non-zero */
41 xor %ebx, %ebx
42
43debug_spinloop:
44 cmp $0, %ebx
45 jz debug_spinloop
46#endif
47
Marshall Dawsonce9c8832017-07-07 16:09:56 -0600[diff] [blame]48 andl $0xfffffff0, %esp
Julius Wernercd49cce2019-03-05 16:53:33 -0800[diff] [blame]49#if CONFIG(IDT_IN_EVERY_STAGE)
Aaron Durbin4b032e42018-04-20 01:39:30 -0600[diff] [blame]50 call exception_init
51#endif
Harshit Sharmaa6ebe082020-07-20 00:21:05 -0700[diff] [blame]52
53#if CONFIG(ASAN_IN_ROMSTAGE)
54 call asan_init
55#endif
Marshall Dawsonce9c8832017-07-07 16:09:56 -0600[diff] [blame]56 call car_stage_entry
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]57
Aaron Durbinafec0712019-08-28 07:34:51 -0600[diff] [blame]58 /* Expect to never return. */
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]591:
60 jmp 1b