blob: 8bc62f7eeca43b3bd56716e9ba6ffd95d3608f4d [file] [log] [blame]
Frans Hendriks863853c2019-06-18 12:18:55 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2013 Google Inc.
5 * Copyright (C) 2015 Intel Corp.
6 * Copyright (C) 2019 Eltan B.V.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#ifndef _SOC_SMBUS_H_
19#define _SOC_SMBUS_H_
20
21/* PCI Configuration Space SMBus */
22#define HOSTC 0x40
23#define HOSTC_I2C_EN (1 << 2)
24
25int smbus_i2c_block_write(u8 addr, u8 bytes, u8 *buf);
26#endif /* _SOC_SMBUS_H_ */