blob: b51e7d46538a5fe09a4311b60df8505a918bc9fe [file] [log] [blame]
Tristan Shieh0eb92df2018-06-08 18:21:45 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2018 MediaTek Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <device/device.h>
Tristan Shieh9315a042018-08-06 13:57:50 +080017#include <soc/emi.h>
Tristan Shieh0eb92df2018-06-08 18:21:45 +080018#include <soc/mmu_operations.h>
Tristan Shieh9315a042018-08-06 13:57:50 +080019#include <symbols.h>
20
21
22static void soc_read_resources(struct device *dev)
23{
24 ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB);
25}
Tristan Shieh0eb92df2018-06-08 18:21:45 +080026
27static void soc_init(struct device *dev)
28{
29 mtk_mmu_disable_l2c_sram();
30}
31
32static struct device_operations soc_ops = {
Tristan Shieh9315a042018-08-06 13:57:50 +080033 .read_resources = soc_read_resources,
Tristan Shieh0eb92df2018-06-08 18:21:45 +080034 .init = soc_init,
35};
36
37static void enable_soc_dev(struct device *dev)
38{
39 dev->ops = &soc_ops;
40}
41
42struct chip_operations soc_mediatek_mt8183_ops = {
43 CHIP_NAME("SOC Mediatek MT8183")
44 .enable_dev = enable_soc_dev,
45};