Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License as |
| 7 | * published by the Free Software Foundation; version 2 of |
| 8 | * the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 16 | #include <bootblock_common.h> |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 17 | #include <stdint.h> |
Elyes HAOUAS | d07048a | 2019-04-21 20:17:11 +0200 | [diff] [blame] | 18 | #include <cf9_reset.h> |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 19 | #include <console/console.h> |
Elyes HAOUAS | 4ad1446 | 2018-06-16 18:29:33 +0200 | [diff] [blame] | 20 | #include <northbridge/intel/sandybridge/raminit_native.h> |
Patrick Rudolph | da9302a | 2019-03-24 17:01:41 +0100 | [diff] [blame] | 21 | #include <southbridge/intel/bd82x6x/pch.h> |
Arthur Heymans | 58a8953 | 2018-06-12 22:58:19 +0200 | [diff] [blame] | 22 | |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 23 | #include "superio.h" |
| 24 | #include "thermal.h" |
| 25 | |
Arthur Heymans | 9c53834 | 2019-11-12 16:42:33 +0100 | [diff] [blame] | 26 | void mainboard_late_rcba_config(void) |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 27 | { |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 28 | /* Set "mobile" bit in MCH (which makes sense layout-wise). */ |
| 29 | /* Note sure if this has any effect at all though. */ |
| 30 | MCHBAR32(0x0004) |= 0x00001000; |
| 31 | MCHBAR32(0x0104) |= 0x00001000; |
| 32 | } |
| 33 | |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 34 | static const u16 hwm_initvals[] = { |
| 35 | HWM_BANK(0), |
| 36 | HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */ |
| 37 | |
| 38 | HWM_BANK(7), /* PECI */ |
| 39 | HWM_INITVAL(0x01, 0x95), /* Enable PECI */ |
| 40 | HWM_INITVAL(0x03, 0x10), /* Enable Agent 0 */ |
| 41 | /* |
| 42 | * PECI temperatures are negative, going up to 0. |
| 43 | * 0 represents the maximum allowable junction temperature, Tjmax. |
| 44 | * There is also Tcontrol, which is the temperature at which the |
| 45 | * system cooling should run at full speed. |
| 46 | * Since the NCT5577D fan control only supports positive values, |
| 47 | * Tbase0 is used as an offset. |
| 48 | */ |
| 49 | HWM_INITVAL(0x09, CRITICAL_TEMPERATURE), /* Tbase0 */ |
| 50 | |
| 51 | HWM_BANK(2), /* CPUFAN control */ |
| 52 | HWM_INITVAL(0x00, 0x0c), /* PECI Agent 0 as CPUFAN monitoring source */ |
| 53 | HWM_INITVAL(0x01, 50), /* Target temperature */ |
| 54 | HWM_INITVAL(0x02, 0x40), /* Enable Smart Fan IV mode */ |
| 55 | HWM_INITVAL(0x03, 0x01), /* Step-up time */ |
| 56 | HWM_INITVAL(0x04, 0x01), /* Step-down time */ |
| 57 | HWM_INITVAL(0x05, 0x10), /* Stop PWM value */ |
| 58 | HWM_INITVAL(0x06, 0x20), /* Start PWM value */ |
| 59 | HWM_INITVAL(0x21, 45), /* Smart Fan IV Temp1 */ |
| 60 | HWM_INITVAL(0x22, 46), /* Smart Fan IV Temp2 */ |
| 61 | HWM_INITVAL(0x23, 47), /* Smart Fan IV Temp3 */ |
| 62 | HWM_INITVAL(0x24, PASSIVE_TEMPERATURE), /* Smart Fan IV Temp4 */ |
| 63 | HWM_INITVAL(0x27, 0x01), /* Smart Fan IV PWM1 */ |
| 64 | HWM_INITVAL(0x28, 0x02), /* Smart Fan IV PWM2 */ |
| 65 | HWM_INITVAL(0x29, 0x03), /* Smart Fan IV PWM3 */ |
| 66 | HWM_INITVAL(0x2a, 0xff), /* Smart Fan IV PWM4 */ |
| 67 | /* Smart Fan IV Critical temp */ |
| 68 | HWM_INITVAL(0x35, CRITICAL_TEMPERATURE), |
| 69 | HWM_INITVAL(0x38, 3), /* Smart Fan IV Critical temp tolerance */ |
| 70 | HWM_INITVAL(0x39, 0x81), /* Enable SYSTIN weight value */ |
| 71 | HWM_INITVAL(0x3a, 1), /* SYSTIN temperature step */ |
| 72 | HWM_INITVAL(0x3b, 2), /* SYSTIN step tolerance */ |
| 73 | HWM_INITVAL(0x3c, 1), /* SYSTIN weight step */ |
| 74 | HWM_INITVAL(0x3d, 40), /* SYSTIN temperature base */ |
| 75 | HWM_INITVAL(0x3e, 0x00), /* SYSTIN fan duty base */ |
| 76 | |
| 77 | HWM_BANK(0), |
| 78 | }; |
| 79 | |
| 80 | static void hwm_init(void) |
| 81 | { |
| 82 | /* Set up fan control */ |
| 83 | for (int i = 0; i < ARRAY_SIZE(hwm_initvals); i++) |
| 84 | HWM_WRITE_INITVAL(hwm_initvals[i]); |
| 85 | } |
| 86 | |
| 87 | static const u16 superio_initvals[] = { |
| 88 | /* Global config registers */ |
| 89 | SUPERIO_INITVAL(0x1a, 0x02), |
| 90 | SUPERIO_INITVAL(0x1b, 0x6a), |
| 91 | SUPERIO_INITVAL(0x27, 0x80), |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 92 | #if CONFIG(DISABLE_UART_ON_TESTPADS) |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 93 | SUPERIO_INITVAL(0x2a, 0x80), |
| 94 | #else |
| 95 | SUPERIO_INITVAL(0x2a, 0x00), |
| 96 | #endif |
| 97 | SUPERIO_INITVAL(0x2c, 0x00), |
| 98 | |
| 99 | SUPERIO_BANK(2), /* UART A */ |
| 100 | SUPERIO_INITVAL(0x30, 0x01), |
| 101 | SUPERIO_INITVAL(0x60, 0x03), |
| 102 | SUPERIO_INITVAL(0x61, 0xf8), |
| 103 | SUPERIO_INITVAL(0x70, 0x04), |
| 104 | |
| 105 | SUPERIO_BANK(7), /* GPIO config */ |
| 106 | SUPERIO_INITVAL(0x30, 0x01), |
| 107 | SUPERIO_INITVAL(0xe0, 0xcf), |
| 108 | SUPERIO_INITVAL(0xe1, 0x0f), |
| 109 | SUPERIO_INITVAL(0xe4, 0xed), |
| 110 | SUPERIO_INITVAL(0xe5, 0x4d), |
| 111 | SUPERIO_INITVAL(0xec, 0x30), |
| 112 | SUPERIO_INITVAL(0xee, 0xff), |
| 113 | |
| 114 | SUPERIO_BANK(8), |
| 115 | SUPERIO_INITVAL(0x30, 0x0a), |
| 116 | SUPERIO_INITVAL(0x60, GPIO_PORT >> 8), |
| 117 | SUPERIO_INITVAL(0x61, GPIO_PORT & 0xff), |
| 118 | |
| 119 | SUPERIO_BANK(9), |
| 120 | SUPERIO_INITVAL(0x30, 0x8c), |
| 121 | SUPERIO_INITVAL(0xe1, 0x90), |
| 122 | |
| 123 | SUPERIO_BANK(0xa), |
| 124 | SUPERIO_INITVAL(0xe4, 0x20), |
| 125 | SUPERIO_INITVAL(0xe6, 0x4c), |
| 126 | |
| 127 | SUPERIO_BANK(0xb), /* HWM & LED */ |
| 128 | SUPERIO_INITVAL(0x30, 0x01), |
| 129 | SUPERIO_INITVAL(0x60, HWM_PORT >> 8), |
| 130 | SUPERIO_INITVAL(0x61, HWM_PORT & 0xff), |
| 131 | SUPERIO_INITVAL(0xf7, 0x67), |
| 132 | SUPERIO_INITVAL(0xf8, 0x60), |
| 133 | |
| 134 | SUPERIO_BANK(0x16), |
| 135 | SUPERIO_INITVAL(0x30, 0x00), |
| 136 | }; |
| 137 | |
| 138 | static void superio_init(void) |
| 139 | { |
| 140 | SUPERIO_UNLOCK; |
| 141 | for (int i = 0; i < ARRAY_SIZE(superio_initvals); i++) |
| 142 | SUPERIO_WRITE_INITVAL(superio_initvals[i]); |
| 143 | SUPERIO_LOCK; |
| 144 | } |
| 145 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 146 | void bootblock_mainboard_early_init(void) |
Tobias Diedrich | 7a95204 | 2017-12-03 10:09:28 +0100 | [diff] [blame] | 147 | { |
| 148 | superio_init(); |
| 149 | hwm_init(); |
| 150 | } |
| 151 | |
| 152 | void mainboard_get_spd(spd_raw_data *spd, bool id_only) |
| 153 | { |
| 154 | read_spd(&spd[0], 0x50, id_only); |
| 155 | read_spd(&spd[2], 0x51, id_only); |
| 156 | } |
| 157 | |
| 158 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 159 | #define USB_CONFIG(enabled, current, ocpin) { enabled, current, ocpin } |
| 160 | #include "usb.h" |
| 161 | }; |