blob: 5e3560cd4eb565b65ce03600225f7587ed283ba4 [file] [log] [blame]
Angel Pons0612b272020-04-05 15:46:56 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Barnali Sarkare13b7752017-02-21 16:24:49 +05302
3#include <smbios.h>
4#include "smbios.h"
5#include <string.h>
Elyes HAOUASf97c1c92019-12-03 18:22:06 +01006#include <commonlib/helpers.h>
Barnali Sarkare13b7752017-02-21 16:24:49 +05307#include <console/console.h>
Duncan Laurie1a86cda2019-06-10 14:00:56 -07008#include <device/dram/ddr3.h>
Barnali Sarkare13b7752017-02-21 16:24:49 +05309
10/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
11void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
Francois Toguo993f68a2019-02-04 17:05:51 -080012 u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id,
Barnali Sarkar6497cd92017-03-07 17:11:03 +053013 const char *module_part_num, size_t module_part_number_size,
Christian Walterf9723222019-05-28 10:37:24 +020014 const u8 *module_serial_num, u16 data_width, u32 vdd_voltage,
Duncan Laurie1a86cda2019-06-10 14:00:56 -070015 bool ecc_support, u16 mod_id, u8 mod_type)
Barnali Sarkare13b7752017-02-21 16:24:49 +053016{
Duncan Laurie1a86cda2019-06-10 14:00:56 -070017 dimm->mod_id = mod_id;
18 /* Translate to DDR2 module type field that SMBIOS code expects. */
19 switch (mod_type) {
20 case SPD_DIMM_TYPE_SO_DIMM:
21 dimm->mod_type = SPD_SODIMM;
22 break;
23 case SPD_DIMM_TYPE_72B_SO_CDIMM:
24 dimm->mod_type = SPD_72B_SO_CDIMM;
25 break;
26 case SPD_DIMM_TYPE_72B_SO_RDIMM:
27 dimm->mod_type = SPD_72B_SO_RDIMM;
28 break;
29 case SPD_DIMM_TYPE_UDIMM:
30 dimm->mod_type = SPD_UDIMM;
31 break;
32 case SPD_DIMM_TYPE_RDIMM:
33 dimm->mod_type = SPD_RDIMM;
34 break;
35 case SPD_DIMM_TYPE_UNDEFINED:
36 default:
37 dimm->mod_type = SPD_UNDEFINED;
38 break;
39 }
Barnali Sarkare13b7752017-02-21 16:24:49 +053040 dimm->dimm_size = dimm_capacity;
41 dimm->ddr_type = ddr_type;
42 dimm->ddr_frequency = frequency;
Francois Toguo993f68a2019-02-04 17:05:51 -080043 dimm->rank_per_dimm = rank_per_dimm;
Barnali Sarkare13b7752017-02-21 16:24:49 +053044 dimm->channel_num = channel_id;
45 dimm->dimm_num = dimm_id;
Christian Walterf9723222019-05-28 10:37:24 +020046 if (vdd_voltage > 0xFFFF) {
47 dimm->vdd_voltage = 0xFFFF;
48 } else {
49 dimm->vdd_voltage = vdd_voltage;
50 }
51
Barnali Sarkare13b7752017-02-21 16:24:49 +053052 strncpy((char *)dimm->module_part_number,
53 module_part_num,
Elyes HAOUASf97c1c92019-12-03 18:22:06 +010054 MIN(sizeof(dimm->module_part_number),
Barnali Sarkar6497cd92017-03-07 17:11:03 +053055 module_part_number_size));
Duncan Laurie46340d02019-05-17 14:57:31 -060056 if (module_serial_num)
57 memcpy(dimm->serial, module_serial_num,
58 DIMM_INFO_SERIAL_SIZE);
Barnali Sarkare13b7752017-02-21 16:24:49 +053059 switch (data_width) {
60 case 8:
61 dimm->bus_width = MEMORY_BUS_WIDTH_8;
62 break;
63 case 16:
64 dimm->bus_width = MEMORY_BUS_WIDTH_16;
65 break;
66 case 32:
67 dimm->bus_width = MEMORY_BUS_WIDTH_32;
68 break;
69 case 64:
70 dimm->bus_width = MEMORY_BUS_WIDTH_64;
71 break;
72 case 128:
73 dimm->bus_width = MEMORY_BUS_WIDTH_128;
74 break;
75 default:
Nico Huberfb95a522017-07-19 15:43:47 +020076 printk(BIOS_NOTICE, "Incorrect DIMM Data width: %u\n",
77 (unsigned int)data_width);
Barnali Sarkare13b7752017-02-21 16:24:49 +053078 }
Christian Walterf9723222019-05-28 10:37:24 +020079
80 if (ecc_support)
81 dimm->bus_width |= 0x8;
Barnali Sarkare13b7752017-02-21 16:24:49 +053082}