blob: 0049616223bbd06a9534fb066dd8fe15596919f3 [file] [log] [blame]
Andrey Petrov2e410752020-03-20 12:08:32 -07001/* SPDX-License-Identifier: GPL-2.0-only */
Andrey Petrov2e410752020-03-20 12:08:32 -07002
3#include <arch/ioapic.h>
Andrey Petrov2e410752020-03-20 12:08:32 -07004#include <console/console.h>
Marc Jones8b522db2020-10-12 11:58:46 -06005#include <console/debug.h>
Andrey Petrov2e410752020-03-20 12:08:32 -07006#include <cpu/x86/lapic.h>
7#include <device/pci.h>
Subrata Banik1366e442020-09-29 13:55:50 +05308#include <intelblocks/lpc_lib.h>
Andrey Petrov4e48ac02020-04-30 14:08:19 -07009#include <intelblocks/p2sb.h>
Jonathan Zhang3172f982020-05-28 17:53:48 -070010#include <soc/acpi.h>
Marc Jones1f500842020-10-15 14:32:51 -060011#include <soc/chip_common.h>
Andrey Petrov8670e822020-03-30 12:25:06 -070012#include <soc/cpu.h>
Andrey Petrov2e410752020-03-20 12:08:32 -070013#include <soc/ramstage.h>
Jonathan Zhang7919d612020-04-02 17:27:54 -070014#include <soc/soc_util.h>
Jonathan Zhang7919d612020-04-02 17:27:54 -070015
Marc Jonesb9365ef2020-10-11 15:00:36 -060016/* UPD parameters to be initialized before SiliconInit */
Andrey Petrov2e410752020-03-20 12:08:32 -070017void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
18{
Marc Jonesb9365ef2020-10-11 15:00:36 -060019 mainboard_silicon_init_params(silupd);
Andrey Petrov2e410752020-03-20 12:08:32 -070020}
21
Jonathan Zhang1ba42a92020-09-21 17:14:44 -070022#if CONFIG(HAVE_ACPI_TABLES)
23static const char *soc_acpi_name(const struct device *dev)
24{
25 if (dev->path.type == DEVICE_PATH_DOMAIN)
26 return "PC00";
27 return NULL;
28}
29#endif
30
Andrey Petrov2e410752020-03-20 12:08:32 -070031static struct device_operations pci_domain_ops = {
32 .read_resources = &pci_domain_read_resources,
Marc Jones1f500842020-10-15 14:32:51 -060033 .set_resources = &xeonsp_pci_domain_set_resources,
34 .scan_bus = &xeonsp_pci_domain_scan_bus,
Jonathan Zhang1ba42a92020-09-21 17:14:44 -070035#if CONFIG(HAVE_ACPI_TABLES)
Jonathan Zhang3172f982020-05-28 17:53:48 -070036 .write_acpi_tables = &northbridge_write_acpi_tables,
Jonathan Zhang1ba42a92020-09-21 17:14:44 -070037 .acpi_name = soc_acpi_name
38#endif
Andrey Petrov2e410752020-03-20 12:08:32 -070039};
40
Andrey Petrov2e410752020-03-20 12:08:32 -070041static struct device_operations cpu_bus_ops = {
Nico Huber2f8ba692020-04-05 14:05:24 +020042 .read_resources = noop_read_resources,
43 .set_resources = noop_set_resources,
Andrey Petrov8670e822020-03-30 12:25:06 -070044 .init = cpx_init_cpus,
Jonathan Zhangc1105952020-06-03 15:55:28 -070045 .acpi_fill_ssdt = generate_cpu_entries,
Andrey Petrov2e410752020-03-20 12:08:32 -070046};
47
Andrey Petrov2e410752020-03-20 12:08:32 -070048struct pci_operations soc_pci_ops = {
49 .set_subsystem = pci_dev_set_subsystem,
50};
51
Jonathan Zhang7919d612020-04-02 17:27:54 -070052static void chip_enable_dev(struct device *dev)
53{
54 /* Set the operations if it is a special bus type */
55 if (dev->path.type == DEVICE_PATH_DOMAIN) {
56 dev->ops = &pci_domain_ops;
57 attach_iio_stacks(dev);
58 } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
59 dev->ops = &cpu_bus_ops;
60 }
61}
62
Andrey Petrov2e410752020-03-20 12:08:32 -070063static void chip_final(void *data)
64{
Andrey Petrov4e48ac02020-04-30 14:08:19 -070065 p2sb_hide();
Jonathan Zhangbea19802020-04-13 19:34:53 -070066
67 set_bios_init_completion();
Andrey Petrov2e410752020-03-20 12:08:32 -070068}
69
70static void chip_init(void *data)
71{
72 printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n");
73 fsp_silicon_init(false);
Subrata Banik1366e442020-09-29 13:55:50 +053074 pch_enable_ioapic();
Andrey Petrov2e410752020-03-20 12:08:32 -070075 setup_lapic();
Andrey Petrov4e48ac02020-04-30 14:08:19 -070076 p2sb_unhide();
Andrey Petrov2e410752020-03-20 12:08:32 -070077}
78
79struct chip_operations soc_intel_xeon_sp_cpx_ops = {
80 CHIP_NAME("Intel Cooperlake-SP")
81 .enable_dev = chip_enable_dev,
82 .init = chip_init,
Jonathan Zhang7919d612020-04-02 17:27:54 -070083 .final = chip_final,
Andrey Petrov2e410752020-03-20 12:08:32 -070084};