blob: 2e9d70f39198cfe776855d5e5a0a97171255813a [file] [log] [blame]
Timothy Pearson53538be2015-04-30 01:47:31 -05001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
5 * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <pc80/mc146818rtc.h>
23
24void bootblock_mainboard_init(void)
25{
26 uint8_t recovery_enabled;
27 unsigned char addr;
28 unsigned char byte;
29
30 bootblock_northbridge_init();
31 bootblock_southbridge_init();
32
33 /* Recovery jumper is connected to SP5100 GPIO61, and clears the GPIO when placed in the Recovery position */
34 recovery_enabled = (!(pci_read_config8(PCI_DEV(0, 0x14, 0), 0x57) & 0x1));
35 if (recovery_enabled) {
36#if CONFIG_USE_OPTION_TABLE
37 /* Clear NVRAM checksum */
38 for (addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++) {
39 cmos_write(0x0, addr);
40 }
41
42 /* Set fallback boot */
43 byte = cmos_read(RTC_BOOT_BYTE);
44 byte &= 0xfc;
45 cmos_write(byte, RTC_BOOT_BYTE);
46#else
47 /* FIXME
48 * Figure out how to recover if the option table is not available
49 */
50#endif
51 }
52}