Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2016 Google Inc. |
| 3 | * |
| 4 | * Based on Linux Kernel TPM driver by |
| 5 | * Peter Huewe <peter.huewe@infineon.com> |
| 6 | * Copyright (C) 2011 Infineon Technologies |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation, version 2 of the |
| 11 | * License. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | /* |
| 20 | * cr50 is a TPM 2.0 capable device that requries special |
| 21 | * handling for the I2C interface. |
| 22 | * |
| 23 | * - Use an interrupt for transaction status instead of hardcoded delays |
| 24 | * - Must use write+wait+read read protocol |
| 25 | * - All 4 bytes of status register must be read/written at once |
| 26 | * - Burst count max is 63 bytes, and burst count behaves |
| 27 | * slightly differently than other I2C TPMs |
| 28 | * - When reading from FIFO the full burstcnt must be read |
| 29 | * instead of just reading header and determining the remainder |
| 30 | */ |
| 31 | |
| 32 | #include <arch/early_variables.h> |
| 33 | #include <commonlib/endian.h> |
| 34 | #include <stdint.h> |
| 35 | #include <string.h> |
| 36 | #include <types.h> |
| 37 | #include <delay.h> |
| 38 | #include <console/console.h> |
| 39 | #include <device/i2c.h> |
| 40 | #include <endian.h> |
| 41 | #include <timer.h> |
| 42 | #include "tpm.h" |
| 43 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 44 | |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 45 | #define CR50_MAX_BUFSIZE 63 |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 46 | #define CR50_TIMEOUT_LONG_MS 2000 /* Long timeout while waiting for TPM */ |
| 47 | #define CR50_TIMEOUT_SHORT_MS 2 /* Short timeout during transactions */ |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 48 | #define CR50_DID_VID 0x00281ae0L |
| 49 | |
| 50 | struct tpm_inf_dev { |
| 51 | int bus; |
| 52 | unsigned int addr; |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 53 | uint8_t buf[CR50_MAX_BUFSIZE + sizeof(uint8_t)]; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 54 | }; |
| 55 | |
| 56 | static struct tpm_inf_dev g_tpm_dev CAR_GLOBAL; |
| 57 | |
| 58 | /* |
| 59 | * iic_tpm_read() - read from TPM register |
| 60 | * |
| 61 | * @addr: register address to read from |
| 62 | * @buffer: provided by caller |
| 63 | * @len: number of bytes to read |
| 64 | * |
| 65 | * 1) send register address byte 'addr' to the TPM |
| 66 | * 2) wait for TPM to indicate it is ready |
| 67 | * 3) read 'len' bytes of TPM response into the provided 'buffer' |
| 68 | * |
| 69 | * Return -1 on error, 0 on success. |
| 70 | */ |
| 71 | static int iic_tpm_read(uint8_t addr, uint8_t *buffer, size_t len) |
| 72 | { |
| 73 | struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); |
| 74 | |
| 75 | if (tpm_dev->addr == 0) |
| 76 | return -1; |
| 77 | |
| 78 | /* Send the register address byte to the TPM */ |
| 79 | if (i2c_write_raw(tpm_dev->bus, tpm_dev->addr, &addr, 1)) { |
| 80 | printk(BIOS_ERR, "%s: Address write failed\n", __func__); |
| 81 | return -1; |
| 82 | } |
| 83 | |
| 84 | /* Wait for TPM to be ready with response data */ |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 85 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 86 | |
| 87 | /* Read response data from the TPM */ |
| 88 | if (i2c_read_raw(tpm_dev->bus, tpm_dev->addr, buffer, len)) { |
| 89 | printk(BIOS_ERR, "%s: Read response failed\n", __func__); |
| 90 | return -1; |
| 91 | } |
| 92 | |
| 93 | return 0; |
| 94 | } |
| 95 | |
| 96 | /* |
| 97 | * iic_tpm_write() - write to TPM register |
| 98 | * |
| 99 | * @addr: register address to write to |
| 100 | * @buffer: data to write |
| 101 | * @len: number of bytes to write |
| 102 | * |
| 103 | * 1) prepend the provided address to the provided data |
| 104 | * 2) send the address+data to the TPM |
| 105 | * 3) wait for TPM to indicate it is done writing |
| 106 | * |
| 107 | * Returns -1 on error, 0 on success. |
| 108 | */ |
| 109 | static int iic_tpm_write(uint8_t addr, uint8_t *buffer, size_t len) |
| 110 | { |
| 111 | struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); |
| 112 | |
| 113 | if (tpm_dev->addr == 0) |
| 114 | return -1; |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 115 | if (len > CR50_MAX_BUFSIZE) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 116 | return -1; |
| 117 | |
| 118 | /* Prepend the 'register address' to the buffer */ |
| 119 | tpm_dev->buf[0] = addr; |
| 120 | memcpy(tpm_dev->buf + 1, buffer, len); |
| 121 | |
| 122 | /* Send write request buffer with address */ |
| 123 | if (i2c_write_raw(tpm_dev->bus, tpm_dev->addr, tpm_dev->buf, len + 1)) { |
| 124 | printk(BIOS_ERR, "%s: Error writing to TPM\n", __func__); |
| 125 | return -1; |
| 126 | } |
| 127 | |
| 128 | /* Wait for TPM to be ready */ |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 129 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 130 | |
| 131 | return 0; |
| 132 | } |
| 133 | |
| 134 | static int check_locality(struct tpm_chip *chip, int loc) |
| 135 | { |
| 136 | uint8_t buf; |
| 137 | |
| 138 | if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) |
| 139 | return -1; |
| 140 | |
| 141 | if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == |
| 142 | (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { |
| 143 | chip->vendor.locality = loc; |
| 144 | return loc; |
| 145 | } |
| 146 | |
| 147 | return -1; |
| 148 | } |
| 149 | |
| 150 | static void release_locality(struct tpm_chip *chip, int loc, int force) |
| 151 | { |
| 152 | uint8_t buf; |
| 153 | if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) |
| 154 | return; |
| 155 | |
| 156 | if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == |
| 157 | (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) { |
| 158 | buf = TPM_ACCESS_ACTIVE_LOCALITY; |
| 159 | iic_tpm_write(TPM_ACCESS(loc), &buf, 1); |
| 160 | } |
| 161 | } |
| 162 | |
| 163 | static int request_locality(struct tpm_chip *chip, int loc) |
| 164 | { |
| 165 | uint8_t buf = TPM_ACCESS_REQUEST_USE; |
| 166 | |
| 167 | if (check_locality(chip, loc) >= 0) |
| 168 | return loc; /* we already have the locality */ |
| 169 | |
| 170 | iic_tpm_write(TPM_ACCESS(loc), &buf, 1); |
| 171 | |
| 172 | /* wait for burstcount */ |
| 173 | int timeout = 2 * 1000; /* 2s timeout */ |
| 174 | while (timeout) { |
| 175 | if (check_locality(chip, loc) >= 0) |
| 176 | return loc; |
| 177 | mdelay(TPM_TIMEOUT); |
| 178 | timeout--; |
| 179 | } |
| 180 | |
| 181 | return -1; |
| 182 | } |
| 183 | |
| 184 | /* cr50 requires all 4 bytes of status register to be read */ |
| 185 | static uint8_t cr50_tis_i2c_status(struct tpm_chip *chip) |
| 186 | { |
| 187 | uint8_t buf[4]; |
| 188 | if (iic_tpm_read(TPM_STS(chip->vendor.locality), |
| 189 | buf, sizeof(buf)) < 0) { |
| 190 | printk(BIOS_ERR, "%s: Failed to read status\n", __func__); |
| 191 | return 0; |
| 192 | } |
| 193 | return buf[0]; |
| 194 | } |
| 195 | |
| 196 | /* cr50 requires all 4 bytes of status register to be written */ |
| 197 | static void cr50_tis_i2c_ready(struct tpm_chip *chip) |
| 198 | { |
| 199 | uint8_t buf[4] = { TPM_STS_COMMAND_READY }; |
| 200 | iic_tpm_write(TPM_STS(chip->vendor.locality), buf, sizeof(buf)); |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 201 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 202 | } |
| 203 | |
| 204 | /* cr50 uses bytes 3:2 of status register for burst count and |
| 205 | * all 4 bytes must be read */ |
| 206 | static int cr50_wait_burst_status(struct tpm_chip *chip, uint8_t mask, |
| 207 | size_t *burst, int *status) |
| 208 | { |
| 209 | uint8_t buf[4]; |
| 210 | struct stopwatch sw; |
| 211 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 212 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 213 | |
| 214 | while (!stopwatch_expired(&sw)) { |
| 215 | if (iic_tpm_read(TPM_STS(chip->vendor.locality), |
| 216 | buf, sizeof(buf)) != 0) { |
| 217 | printk(BIOS_WARNING, "%s: Read failed\n", __func__); |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 218 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 219 | continue; |
| 220 | } |
| 221 | |
| 222 | *status = buf[0]; |
| 223 | *burst = read_le16(&buf[1]); |
| 224 | |
| 225 | /* Check if mask matches and burst is valid */ |
| 226 | if ((*status & mask) == mask && |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 227 | *burst > 0 && *burst <= CR50_MAX_BUFSIZE) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 228 | return 0; |
| 229 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 230 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 231 | } |
| 232 | |
| 233 | printk(BIOS_ERR, "%s: Timeout reading burst and status\n", __func__); |
| 234 | return -1; |
| 235 | } |
| 236 | |
| 237 | static int cr50_tis_i2c_recv(struct tpm_chip *chip, uint8_t *buf, |
| 238 | size_t buf_len) |
| 239 | { |
| 240 | size_t burstcnt, current, len, expected; |
| 241 | uint8_t addr = TPM_DATA_FIFO(chip->vendor.locality); |
| 242 | int status; |
| 243 | int ret = -1; |
| 244 | |
| 245 | if (buf_len < TPM_HEADER_SIZE) |
| 246 | goto out; |
| 247 | |
| 248 | if (cr50_wait_burst_status(chip, TPM_STS_VALID, &burstcnt, &status) < 0) |
| 249 | goto out; |
| 250 | if (!(status & TPM_STS_DATA_AVAIL)) { |
| 251 | printk(BIOS_ERR, "%s: First chunk not available\n", __func__); |
| 252 | goto out; |
| 253 | } |
| 254 | |
| 255 | /* Read first chunk of burstcnt bytes */ |
| 256 | if (iic_tpm_read(addr, buf, burstcnt) != 0) { |
| 257 | printk(BIOS_ERR, "%s: Read failed\n", __func__); |
| 258 | goto out; |
| 259 | } |
| 260 | |
| 261 | /* Determine expected data in the return buffer */ |
| 262 | expected = read_be32(buf + TPM_RSP_SIZE_BYTE); |
| 263 | if (expected > buf_len) { |
| 264 | printk(BIOS_ERR, "%s: Too much data: %zu > %zu\n", |
| 265 | __func__, expected, buf_len); |
| 266 | goto out; |
| 267 | } |
| 268 | |
| 269 | /* Now read the rest of the data */ |
| 270 | current = burstcnt; |
| 271 | while (current < expected) { |
| 272 | /* Read updated burst count and check status */ |
| 273 | if (cr50_wait_burst_status(chip, TPM_STS_VALID, |
| 274 | &burstcnt, &status) < 0) |
| 275 | goto out; |
| 276 | if (!(status & TPM_STS_DATA_AVAIL)) { |
| 277 | printk(BIOS_ERR, "%s: Data not available\n", __func__); |
| 278 | goto out; |
| 279 | } |
| 280 | |
| 281 | len = min(burstcnt, expected - current); |
| 282 | if (iic_tpm_read(addr, buf + current, len) != 0) { |
| 283 | printk(BIOS_ERR, "%s: Read failed\n", __func__); |
| 284 | goto out; |
| 285 | } |
| 286 | |
| 287 | current += len; |
| 288 | } |
| 289 | |
| 290 | /* Ensure TPM is done reading data */ |
| 291 | if (cr50_wait_burst_status(chip, TPM_STS_VALID, &burstcnt, &status) < 0) |
| 292 | goto out; |
| 293 | if (status & TPM_STS_DATA_AVAIL) { |
| 294 | printk(BIOS_ERR, "%s: Data still available\n", __func__); |
| 295 | goto out; |
| 296 | } |
| 297 | |
| 298 | ret = current; |
| 299 | |
| 300 | out: |
| 301 | return ret; |
| 302 | } |
| 303 | |
| 304 | static int cr50_tis_i2c_send(struct tpm_chip *chip, uint8_t *buf, size_t len) |
| 305 | { |
| 306 | int status; |
| 307 | size_t burstcnt, limit, sent = 0; |
| 308 | uint8_t tpm_go[4] = { TPM_STS_GO }; |
| 309 | struct stopwatch sw; |
| 310 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 311 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 312 | |
| 313 | /* Wait until TPM is ready for a command */ |
| 314 | while (!(cr50_tis_i2c_status(chip) & TPM_STS_COMMAND_READY)) { |
| 315 | if (stopwatch_expired(&sw)) { |
| 316 | printk(BIOS_ERR, "%s: Command ready timeout\n", |
| 317 | __func__); |
| 318 | return -1; |
| 319 | } |
| 320 | |
| 321 | cr50_tis_i2c_ready(chip); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 322 | } |
| 323 | |
| 324 | while (len > 0) { |
| 325 | /* Read burst count and check status */ |
| 326 | if (cr50_wait_burst_status(chip, TPM_STS_VALID, |
| 327 | &burstcnt, &status) < 0) |
| 328 | goto out; |
| 329 | if (sent > 0 && !(status & TPM_STS_DATA_EXPECT)) { |
| 330 | printk(BIOS_ERR, "%s: Data not expected\n", __func__); |
| 331 | goto out; |
| 332 | } |
| 333 | |
| 334 | /* Use burstcnt - 1 to account for the address byte |
| 335 | * that is inserted by iic_tpm_write() */ |
| 336 | limit = min(burstcnt - 1, len); |
| 337 | if (iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), |
| 338 | &buf[sent], limit) != 0) { |
| 339 | printk(BIOS_ERR, "%s: Write failed\n", __func__); |
| 340 | goto out; |
| 341 | } |
| 342 | |
| 343 | sent += limit; |
| 344 | len -= limit; |
| 345 | } |
| 346 | |
| 347 | /* Ensure TPM is not expecting more data */ |
| 348 | if (cr50_wait_burst_status(chip, TPM_STS_VALID, &burstcnt, &status) < 0) |
| 349 | goto out; |
| 350 | if (status & TPM_STS_DATA_EXPECT) { |
| 351 | printk(BIOS_ERR, "%s: Data still expected\n", __func__); |
| 352 | goto out; |
| 353 | } |
| 354 | |
| 355 | /* Start the TPM command */ |
| 356 | if (iic_tpm_write(TPM_STS(chip->vendor.locality), tpm_go, |
| 357 | sizeof(tpm_go)) < 0) { |
| 358 | printk(BIOS_ERR, "%s: Start command failed\n", __func__); |
| 359 | goto out; |
| 360 | } |
| 361 | return sent; |
| 362 | |
| 363 | out: |
| 364 | /* Abort current transaction if still pending */ |
| 365 | if (cr50_tis_i2c_status(chip) & TPM_STS_COMMAND_READY) |
| 366 | cr50_tis_i2c_ready(chip); |
| 367 | return -1; |
| 368 | } |
| 369 | |
| 370 | static void cr50_vendor_init(struct tpm_chip *chip) |
| 371 | { |
| 372 | memset(&chip->vendor, 0, sizeof(struct tpm_vendor_specific)); |
| 373 | chip->vendor.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID; |
| 374 | chip->vendor.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID; |
| 375 | chip->vendor.req_canceled = TPM_STS_COMMAND_READY; |
| 376 | chip->vendor.status = &cr50_tis_i2c_status; |
| 377 | chip->vendor.recv = &cr50_tis_i2c_recv; |
| 378 | chip->vendor.send = &cr50_tis_i2c_send; |
| 379 | chip->vendor.cancel = &cr50_tis_i2c_ready; |
| 380 | } |
| 381 | |
| 382 | int tpm_vendor_probe(unsigned bus, uint32_t addr) |
| 383 | { |
| 384 | struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); |
| 385 | struct stopwatch sw; |
| 386 | uint8_t buf = 0; |
| 387 | int ret; |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 388 | long sw_run_duration = CR50_TIMEOUT_LONG_MS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 389 | |
| 390 | tpm_dev->bus = bus; |
| 391 | tpm_dev->addr = addr; |
| 392 | |
| 393 | /* Wait for TPM_ACCESS register ValidSts bit to be set */ |
| 394 | stopwatch_init_msecs_expire(&sw, sw_run_duration); |
| 395 | do { |
| 396 | ret = iic_tpm_read(TPM_ACCESS(0), &buf, 1); |
| 397 | if (!ret && (buf & TPM_STS_VALID)) { |
| 398 | sw_run_duration = stopwatch_duration_msecs(&sw); |
| 399 | break; |
| 400 | } |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame^] | 401 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 402 | } while (!stopwatch_expired(&sw)); |
| 403 | |
| 404 | printk(BIOS_INFO, |
| 405 | "%s: ValidSts bit %s(%d) in TPM_ACCESS register after %ld ms\n", |
| 406 | __func__, (buf & TPM_STS_VALID) ? "set" : "clear", |
| 407 | (buf & TPM_STS_VALID) >> 7, sw_run_duration); |
| 408 | |
| 409 | /* Claim failure if the ValidSts (bit 7) is clear */ |
| 410 | if (!(buf & TPM_STS_VALID)) |
| 411 | return -1; |
| 412 | |
| 413 | return 0; |
| 414 | } |
| 415 | |
| 416 | int tpm_vendor_init(struct tpm_chip *chip, unsigned bus, uint32_t dev_addr) |
| 417 | { |
| 418 | struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev); |
| 419 | uint32_t vendor; |
| 420 | |
| 421 | if (dev_addr == 0) { |
| 422 | printk(BIOS_ERR, "%s: missing device address\n", __func__); |
| 423 | return -1; |
| 424 | } |
| 425 | |
| 426 | tpm_dev->bus = bus; |
| 427 | tpm_dev->addr = dev_addr; |
| 428 | |
| 429 | cr50_vendor_init(chip); |
| 430 | |
| 431 | /* Disable interrupts (not supported) */ |
| 432 | chip->vendor.irq = 0; |
| 433 | |
| 434 | if (request_locality(chip, 0) != 0) |
| 435 | return -1; |
| 436 | |
| 437 | /* Read four bytes from DID_VID register */ |
| 438 | if (iic_tpm_read(TPM_DID_VID(0), (uint8_t *)&vendor, 4) < 0) |
| 439 | goto out_err; |
| 440 | |
| 441 | if (vendor != CR50_DID_VID) { |
| 442 | printk(BIOS_DEBUG, "Vendor ID 0x%08x not recognized\n", vendor); |
| 443 | goto out_err; |
| 444 | } |
| 445 | |
| 446 | printk(BIOS_DEBUG, "cr50 TPM %u:%02x (device-id 0x%X)\n", |
| 447 | tpm_dev->bus, tpm_dev->addr, vendor >> 16); |
| 448 | |
| 449 | chip->is_open = 1; |
| 450 | return 0; |
| 451 | |
| 452 | out_err: |
| 453 | release_locality(chip, 0, 1); |
| 454 | return -1; |
| 455 | } |
| 456 | |
| 457 | void tpm_vendor_cleanup(struct tpm_chip *chip) |
| 458 | { |
| 459 | release_locality(chip, chip->vendor.locality, 1); |
| 460 | } |