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Patrick Georgi11f00792020-03-04 15:10:45 +01001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Kyösti Mälkkie7e847c2013-06-27 08:20:09 +03003
Kyösti Mälkkie7e847c2013-06-27 08:20:09 +03004#include <cbmem.h>
5
Julius Wernercd49cce2019-03-05 16:53:33 -08006#if CONFIG(CBMEM_TOP_BACKUP)
Kyösti Mälkkia7dd6452017-04-19 07:37:38 +03007
Arthur Heymans340e4b82019-10-23 17:25:58 +02008void *cbmem_top_chipset(void)
Kyösti Mälkki697927c2013-10-13 04:15:40 +03009{
Kyösti Mälkki513a1a82018-06-03 12:29:50 +030010 /* Top of CBMEM is at highest usable DRAM address below 4GiB. */
Arthur Heymans7c9a0e82019-10-23 17:02:50 +020011 return (void *)restore_top_of_low_cacheable();
Kyösti Mälkki697927c2013-10-13 04:15:40 +030012}
Kyösti Mälkki2fb6b402014-12-19 08:20:45 +020013
Kyösti Mälkkia7dd6452017-04-19 07:37:38 +030014#endif /* CBMEM_TOP_BACKUP */