Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2003 Linux Networx |
| 5 | * Copyright (C) 2004 SuSE Linux AG |
| 6 | * Copyright (C) 2004 Tyan Computer |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; version 2 of |
| 11 | * the License. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 21 | */ |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 22 | |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 23 | #include <console/console.h> |
| 24 | #include <device/device.h> |
| 25 | #include <device/pci.h> |
| 26 | #include <device/pci_ids.h> |
| 27 | #include <device/pci_ops.h> |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 28 | #include <pc80/mc146818rtc.h> |
Steven J. Magnani | ef79223 | 2005-09-21 13:53:44 +0000 | [diff] [blame] | 29 | #include <pc80/isa-dma.h> |
| 30 | #include <arch/io.h> |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 31 | #include "i82801dx.h" |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 32 | |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 33 | #define NMI_OFF 0 |
| 34 | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 35 | void i82801dx_enable_ioapic(struct device *dev) |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 36 | { |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 37 | u32 dword; |
| 38 | volatile u32 *ioapic_sba = (volatile u32 *)0xfec00000; |
| 39 | volatile u32 *ioapic_sbd = (volatile u32 *)0xfec00010; |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 40 | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 41 | dword = pci_read_config32(dev, GEN_CNTL); |
| 42 | dword |= (3 << 7); /* enable ioapic */ |
| 43 | dword |= (1 << 13); /* coprocessor error enable */ |
| 44 | dword |= (1 << 1); /* delay transaction enable */ |
| 45 | dword |= (1 << 2); /* DMA collection buf enable */ |
| 46 | pci_write_config32(dev, GEN_CNTL, dword); |
| 47 | printk_debug("ioapic southbridge enabled %x\n", dword); |
| 48 | *ioapic_sba = 0; |
| 49 | *ioapic_sbd = (2 << 24); |
| 50 | //lyh *ioapic_sba=3; |
| 51 | //lyh *ioapic_sbd=1; |
| 52 | *ioapic_sba = 0; |
| 53 | dword = *ioapic_sbd; |
| 54 | printk_debug("Southbridge apic id = %x\n", dword); |
| 55 | if (dword != (2 << 24)) |
| 56 | die(""); |
| 57 | //lyh *ioapic_sba=3; |
| 58 | //lyh dword=*ioapic_sbd; |
| 59 | //lyh printk_debug("Southbridge apic DT = %x\n",dword); |
| 60 | //lyh if(dword!=1) |
| 61 | //lyh die(""); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 62 | |
| 63 | } |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 64 | |
| 65 | void i82801dx_enable_serial_irqs(struct device *dev) |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 66 | { |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 67 | pci_write_config8(dev, SERIRQ_CNTL, |
| 68 | (1 << 7) | (1 << 6) | ((21 - 17) << 2) | (0 << 0)); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 69 | } |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 70 | |
| 71 | void i82801dx_lpc_route_dma(struct device *dev, u8 mask) |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 72 | { |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 73 | u16 word; |
| 74 | int i; |
| 75 | word = pci_read_config16(dev, PCI_DMA_CFG); |
| 76 | word &= ((1 << 10) - (1 << 8)); |
| 77 | for (i = 0; i < 8; i++) { |
| 78 | if (i == 4) |
| 79 | continue; |
| 80 | word |= ((mask & (1 << i)) ? 3 : 1) << (i * 2); |
| 81 | } |
| 82 | pci_write_config16(dev, PCI_DMA_CFG, word); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 83 | } |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 84 | |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 85 | void i82801dx_rtc_init(struct device *dev) |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 86 | { |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 87 | u8 byte; |
| 88 | u32 dword; |
| 89 | int rtc_failed; |
| 90 | byte = pci_read_config8(dev, GEN_PMCON_3); |
| 91 | rtc_failed = byte & RTC_FAILED; |
| 92 | if (rtc_failed) { |
| 93 | byte &= ~(1 << 1); /* preserve the power fail state */ |
| 94 | pci_write_config8(dev, GEN_PMCON_3, byte); |
| 95 | } |
| 96 | dword = pci_read_config32(dev, GEN_STS); |
| 97 | rtc_failed |= dword & (1 << 2); |
| 98 | rtc_init(rtc_failed); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 99 | } |
| 100 | |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 101 | void i82801dx_1f0_misc(struct device *dev) |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 102 | { |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 103 | pci_write_config16(dev, PCICMD, 0x014f); |
| 104 | pci_write_config32(dev, PMBASE, 0x00001001); |
| 105 | pci_write_config8(dev, ACPI_CNTL, 0x10); |
| 106 | pci_write_config32(dev, GPIO_BASE, 0x00001181); |
| 107 | pci_write_config8(dev, GPIO_CNTL, 0x10); |
| 108 | pci_write_config32(dev, PIRQA_ROUT, 0x0A05030B); |
| 109 | pci_write_config8(dev, PIRQE_ROUT, 0x07); |
| 110 | pci_write_config8(dev, RTC_CONF, 0x04); |
| 111 | pci_write_config8(dev, COM_DEC, 0x10); //lyh E0-> |
| 112 | pci_write_config16(dev, LPC_EN, 0x000F); //LYH 000D-> |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 113 | } |
| 114 | |
| 115 | static void enable_hpet(struct device *dev) |
| 116 | { |
Stefan Reinauer | b319b17 | 2010-03-17 03:14:28 +0000 | [diff] [blame] | 117 | const unsigned long hpet_address = 0xfed00000; |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 118 | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 119 | u32 dword; |
| 120 | u32 code = (0 & 0x3); |
| 121 | |
| 122 | dword = pci_read_config32(dev, GEN_CNTL); |
| 123 | dword |= (1 << 17); /* enable hpet */ |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 124 | /*Bits [16:15]Memory Address Range |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 125 | 00 FED0_0000h - FED0_03FFh |
| 126 | 01 FED0_1000h - FED0_13FFh |
| 127 | 10 FED0_2000h - FED0_23FFh |
| 128 | 11 FED0_3000h - FED0_33FFh */ |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 129 | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 130 | dword &= ~(3 << 15); /* clear it */ |
| 131 | dword |= (code << 15); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 132 | |
Stefan Reinauer | b319b17 | 2010-03-17 03:14:28 +0000 | [diff] [blame] | 133 | printk_debug("enabling HPET @0x%lx\n", hpet_address | (code << 12)); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 134 | } |
| 135 | |
| 136 | static void lpc_init(struct device *dev) |
| 137 | { |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 138 | u8 byte; |
| 139 | int pwr_on = -1; |
Luc Verhaegen | a9c5ea0 | 2009-06-03 14:19:33 +0000 | [diff] [blame] | 140 | int nmi_option; |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 141 | |
| 142 | /* IO APIC initialization */ |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 143 | i82801dx_enable_ioapic(dev); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 144 | |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 145 | i82801dx_enable_serial_irqs(dev); |
Steven J. Magnani | ef79223 | 2005-09-21 13:53:44 +0000 | [diff] [blame] | 146 | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 147 | #ifdef SUSPICIOUS_LOOKING_CODE |
Steven J. Magnani | ef79223 | 2005-09-21 13:53:44 +0000 | [diff] [blame] | 148 | // The ICH-4 datasheet does not mention this configuration register. |
| 149 | // This code may have been inherited (incorrectly) from code for the AMD 766 southbridge, |
| 150 | // which *does* support this functionality. |
| 151 | |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 152 | /* posted memory write enable */ |
| 153 | byte = pci_read_config8(dev, 0x46); |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 154 | pci_write_config8(dev, 0x46, byte | (1 << 0)); |
Steven J. Magnani | ef79223 | 2005-09-21 13:53:44 +0000 | [diff] [blame] | 155 | #endif |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 156 | |
| 157 | /* power after power fail */ |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 158 | /* FIXME this doesn't work! */ |
| 159 | /* Which state do we want to goto after g3 (power restored)? |
| 160 | * 0 == S0 Full On |
| 161 | * 1 == S5 Soft Off |
| 162 | */ |
| 163 | pci_write_config8(dev, GEN_PMCON_3, pwr_on ? 0 : 1); |
| 164 | printk_info("set power %s after power fail\n", pwr_on ? "on" : "off"); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 165 | #if 0 |
| 166 | /* Enable Error reporting */ |
| 167 | /* Set up sync flood detected */ |
| 168 | byte = pci_read_config8(dev, 0x47); |
| 169 | byte |= (1 << 1); |
| 170 | pci_write_config8(dev, 0x47, byte); |
| 171 | #endif |
| 172 | |
| 173 | /* Set up NMI on errors */ |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 174 | byte = inb(0x61); |
| 175 | byte &= ~(1 << 3); /* IOCHK# NMI Enable */ |
| 176 | byte &= ~(1 << 2); /* PCI SERR# Enable */ |
| 177 | outb(byte, 0x61); |
| 178 | byte = inb(0x70); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 179 | nmi_option = NMI_OFF; |
Luc Verhaegen | a9c5ea0 | 2009-06-03 14:19:33 +0000 | [diff] [blame] | 180 | get_option(&nmi_option, "nmi"); |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 181 | if (nmi_option) { |
| 182 | byte &= ~(1 << 7); /* set NMI */ |
| 183 | outb(byte, 0x70); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 184 | } |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 185 | |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 186 | /* Initialize the real time clock */ |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 187 | i82801dx_rtc_init(dev); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 188 | |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 189 | i82801dx_lpc_route_dma(dev, 0xff); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 190 | |
| 191 | /* Initialize isa dma */ |
| 192 | isa_dma_init(); |
| 193 | |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 194 | i82801dx_1f0_misc(dev); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 195 | /* Initialize the High Precision Event Timers */ |
| 196 | enable_hpet(dev); |
| 197 | } |
| 198 | |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 199 | static void i82801dx_lpc_read_resources(device_t dev) |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 200 | { |
Eric Biederman | 4f9265f | 2004-10-22 02:33:51 +0000 | [diff] [blame] | 201 | struct resource *res; |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 202 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 203 | /* Get the normal PCI resources of this device. */ |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 204 | pci_dev_read_resources(dev); |
| 205 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 206 | /* Add an extra subtractive resource for both memory and I/O. */ |
Eric Biederman | 4f9265f | 2004-10-22 02:33:51 +0000 | [diff] [blame] | 207 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 208 | res->base = 0; |
| 209 | res->size = 0x1000; |
| 210 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 211 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Eric Biederman | 4f9265f | 2004-10-22 02:33:51 +0000 | [diff] [blame] | 212 | |
| 213 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 214 | res->base = 0xff800000; |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 215 | res->size = 0x00800000; /* 8 MB for flash */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 216 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 217 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 218 | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 219 | res = new_resource(dev, 3); /* IOAPIC */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 220 | res->base = 0xfec00000; |
| 221 | res->size = 0x00001000; |
| 222 | res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Eric Biederman | 4f9265f | 2004-10-22 02:33:51 +0000 | [diff] [blame] | 223 | } |
| 224 | |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 225 | static void i82801dx_lpc_enable_resources(device_t dev) |
Eric Biederman | 4f9265f | 2004-10-22 02:33:51 +0000 | [diff] [blame] | 226 | { |
| 227 | pci_dev_enable_resources(dev); |
| 228 | enable_childrens_resources(dev); |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 229 | } |
| 230 | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 231 | static struct device_operations lpc_ops = { |
| 232 | .read_resources = i82801dx_lpc_read_resources, |
| 233 | .set_resources = pci_dev_set_resources, |
Stefan Reinauer | 138be83 | 2010-02-27 01:50:21 +0000 | [diff] [blame] | 234 | .enable_resources = i82801dx_lpc_enable_resources, |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 235 | .init = lpc_init, |
| 236 | .scan_bus = scan_static_bus, |
| 237 | .enable = i82801dx_enable, |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 238 | }; |
| 239 | |
Stefan Reinauer | 8702ab5 | 2010-03-14 17:01:08 +0000 | [diff] [blame] | 240 | /* 82801DB/DBL */ |
| 241 | static const struct pci_driver lpc_driver_db __pci_driver = { |
| 242 | .ops = &lpc_ops, |
| 243 | .vendor = PCI_VENDOR_ID_INTEL, |
| 244 | .device = PCI_DEVICE_ID_INTEL_82801DB_LPC, |
| 245 | }; |
| 246 | |
| 247 | /* 82801DBM */ |
| 248 | static const struct pci_driver lpc_driver_dbm __pci_driver = { |
| 249 | .ops = &lpc_ops, |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 250 | .vendor = PCI_VENDOR_ID_INTEL, |
Uwe Hermann | a29ec06 | 2007-11-04 03:21:37 +0000 | [diff] [blame] | 251 | .device = PCI_DEVICE_ID_INTEL_82801DBM_LPC, |
Ronald G. Minnich | 182615d | 2004-08-24 16:20:46 +0000 | [diff] [blame] | 252 | }; |