Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2005 Yinghai Lu <yinghailu@gmail.com> |
| 5 | * Copyright (C) 2009 coresystems GmbH |
| 6 | * Copyright (C) 2013 Vladimir Serbinenko |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
| 18 | #include <arch/io.h> |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 19 | #include <console/console.h> |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 20 | #include <device/smbus_def.h> |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 21 | #include <stdlib.h> |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 22 | #include "smbus.h" |
| 23 | |
| 24 | |
Kyösti Mälkki | b5d998b | 2017-08-20 21:36:08 +0300 | [diff] [blame] | 25 | #if IS_ENABLED(CONFIG_DEBUG_SMBUS) |
| 26 | #define dprintk(args...) printk(BIOS_DEBUG, ##args) |
| 27 | #else |
| 28 | #define dprintk(args...) do {} while (0) |
| 29 | #endif |
| 30 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 31 | /* I801 command constants */ |
| 32 | #define I801_QUICK (0 << 2) |
| 33 | #define I801_BYTE (1 << 2) |
| 34 | #define I801_BYTE_DATA (2 << 2) |
| 35 | #define I801_WORD_DATA (3 << 2) |
| 36 | #define I801_BLOCK_DATA (5 << 2) |
| 37 | #define I801_I2C_BLOCK_DATA (6 << 2) /* ICH5 and later */ |
| 38 | |
| 39 | /* I801 Host Control register bits */ |
| 40 | #define SMBHSTCNT_INTREN (1 << 0) |
| 41 | #define SMBHSTCNT_KILL (1 << 1) |
| 42 | #define SMBHSTCNT_LAST_BYTE (1 << 5) |
| 43 | #define SMBHSTCNT_START (1 << 6) |
| 44 | #define SMBHSTCNT_PEC_EN (1 << 7) /* ICH3 and later */ |
| 45 | |
| 46 | /* I801 Hosts Status register bits */ |
| 47 | #define SMBHSTSTS_BYTE_DONE (1 << 7) |
| 48 | #define SMBHSTSTS_INUSE_STS (1 << 6) |
| 49 | #define SMBHSTSTS_SMBALERT_STS (1 << 5) |
| 50 | #define SMBHSTSTS_FAILED (1 << 4) |
| 51 | #define SMBHSTSTS_BUS_ERR (1 << 3) |
| 52 | #define SMBHSTSTS_DEV_ERR (1 << 2) |
| 53 | #define SMBHSTSTS_INTR (1 << 1) |
| 54 | #define SMBHSTSTS_HOST_BUSY (1 << 0) |
| 55 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 56 | /* For SMBXMITADD register. */ |
| 57 | #define XMIT_WRITE(dev) (((dev) << 1) | 0) |
| 58 | #define XMIT_READ(dev) (((dev) << 1) | 1) |
| 59 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 60 | #define SMBUS_TIMEOUT (10 * 1000 * 100) |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 61 | #define SMBUS_BLOCK_MAXLEN 32 |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 62 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 63 | /* block_cmd_loop flags */ |
| 64 | #define BLOCK_READ 0 |
| 65 | #define BLOCK_WRITE (1 << 0) |
| 66 | #define BLOCK_I2C (1 << 1) |
| 67 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 68 | static void smbus_delay(void) |
| 69 | { |
| 70 | inb(0x80); |
| 71 | } |
| 72 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 73 | static int host_completed(u8 status) |
| 74 | { |
| 75 | if (status & SMBHSTSTS_HOST_BUSY) |
| 76 | return 0; |
| 77 | status &= ~(SMBHSTSTS_SMBALERT_STS | SMBHSTSTS_INUSE_STS); |
| 78 | return status != 0; |
| 79 | } |
| 80 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 81 | static int recover_master(int smbus_base, int ret) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 82 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 83 | /* TODO: Depending of the failure, drive KILL transaction |
| 84 | * or force soft reset on SMBus master controller. |
| 85 | */ |
| 86 | printk(BIOS_ERR, "SMBus: Fatal master timeout (%d)\n", ret); |
| 87 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 88 | } |
| 89 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 90 | static int cb_err_from_stat(u8 status) |
| 91 | { |
| 92 | /* Ignore the "In Use" status... */ |
| 93 | status &= ~(SMBHSTSTS_SMBALERT_STS | SMBHSTSTS_INUSE_STS); |
| 94 | |
| 95 | if (status == SMBHSTSTS_INTR) |
| 96 | return 0; |
| 97 | |
| 98 | return SMBUS_ERROR; |
| 99 | } |
| 100 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 101 | static int setup_command(unsigned int smbus_base, u8 ctrl, u8 xmitadd) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 102 | { |
| 103 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 104 | u8 host_busy; |
| 105 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 106 | do { |
| 107 | smbus_delay(); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 108 | host_busy = inb(smbus_base + SMBHSTSTAT) & SMBHSTSTS_HOST_BUSY; |
| 109 | } while (--loops && host_busy); |
| 110 | |
| 111 | if (loops == 0) |
| 112 | return recover_master(smbus_base, |
| 113 | SMBUS_WAIT_UNTIL_READY_TIMEOUT); |
| 114 | |
| 115 | /* Clear any lingering errors, so the transaction will run. */ |
| 116 | outb(inb(smbus_base + SMBHSTSTAT), smbus_base + SMBHSTSTAT); |
| 117 | |
| 118 | /* Set up transaction */ |
| 119 | /* Disable interrupts */ |
| 120 | outb(ctrl, (smbus_base + SMBHSTCTL)); |
| 121 | |
| 122 | /* Set the device I'm talking to. */ |
| 123 | outb(xmitadd, smbus_base + SMBXMITADD); |
| 124 | |
| 125 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 126 | } |
| 127 | |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 128 | static int execute_command(unsigned int smbus_base) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 129 | { |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 130 | unsigned int loops = SMBUS_TIMEOUT; |
| 131 | u8 status; |
| 132 | |
| 133 | /* Start the command. */ |
| 134 | outb((inb(smbus_base + SMBHSTCTL) | SMBHSTCNT_START), |
| 135 | smbus_base + SMBHSTCTL); |
| 136 | |
| 137 | /* Poll for it to start. */ |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 138 | do { |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 139 | smbus_delay(); |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 140 | |
| 141 | /* If we poll too slow, we could miss HOST_BUSY flag |
| 142 | * set and detect INTR or x_ERR flags instead here. |
| 143 | */ |
| 144 | status = inb(smbus_base + SMBHSTSTAT); |
| 145 | status &= ~(SMBHSTSTS_SMBALERT_STS | SMBHSTSTS_INUSE_STS); |
| 146 | } while (--loops && status == 0); |
| 147 | |
| 148 | if (loops == 0) |
| 149 | return recover_master(smbus_base, |
| 150 | SMBUS_WAIT_UNTIL_ACTIVE_TIMEOUT); |
| 151 | |
| 152 | return 0; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 153 | } |
| 154 | |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 155 | static int complete_command(unsigned int smbus_base) |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 156 | { |
| 157 | unsigned int loops = SMBUS_TIMEOUT; |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 158 | u8 status; |
| 159 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 160 | do { |
| 161 | smbus_delay(); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 162 | status = inb(smbus_base + SMBHSTSTAT); |
| 163 | } while (--loops && !host_completed(status)); |
| 164 | |
| 165 | if (loops == 0) |
| 166 | return recover_master(smbus_base, |
| 167 | SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
| 168 | |
| 169 | return cb_err_from_stat(status); |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 170 | } |
| 171 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 172 | int do_smbus_read_byte(unsigned int smbus_base, u8 device, |
| 173 | unsigned int address) |
| 174 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 175 | int ret; |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 176 | u8 byte; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 177 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 178 | /* Set up for a byte data read. */ |
| 179 | ret = setup_command(smbus_base, I801_BYTE_DATA, XMIT_READ(device)); |
| 180 | if (ret < 0) |
| 181 | return ret; |
| 182 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 183 | /* Set the command/address... */ |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 184 | outb(address, smbus_base + SMBHSTCMD); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 185 | |
| 186 | /* Clear the data byte... */ |
| 187 | outb(0, smbus_base + SMBHSTDAT0); |
| 188 | |
| 189 | /* Start the command */ |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 190 | ret = execute_command(smbus_base); |
| 191 | if (ret < 0) |
| 192 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 193 | |
| 194 | /* Poll for transaction completion */ |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 195 | ret = complete_command(smbus_base); |
| 196 | if (ret < 0) |
| 197 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 198 | |
| 199 | /* Read results of transaction */ |
| 200 | byte = inb(smbus_base + SMBHSTDAT0); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 201 | return byte; |
| 202 | } |
| 203 | |
| 204 | int do_smbus_write_byte(unsigned int smbus_base, u8 device, |
| 205 | unsigned int address, unsigned int data) |
| 206 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 207 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 208 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 209 | /* Set up for a byte data write. */ |
| 210 | ret = setup_command(smbus_base, I801_BYTE_DATA, XMIT_WRITE(device)); |
| 211 | if (ret < 0) |
| 212 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 213 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 214 | /* Set the command/address... */ |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 215 | outb(address, smbus_base + SMBHSTCMD); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 216 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 217 | /* Set the data byte... */ |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 218 | outb(data, smbus_base + SMBHSTDAT0); |
| 219 | |
| 220 | /* Start the command */ |
Kyösti Mälkki | a2dcf73 | 2017-08-20 21:36:15 +0300 | [diff] [blame] | 221 | ret = execute_command(smbus_base); |
| 222 | if (ret < 0) |
| 223 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 224 | |
| 225 | /* Poll for transaction completion */ |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 226 | return complete_command(smbus_base); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 227 | } |
| 228 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 229 | static int block_cmd_loop(unsigned int smbus_base, |
| 230 | u8 *buf, const unsigned int max_bytes, int flags) |
| 231 | { |
| 232 | u8 status; |
| 233 | unsigned int loops = SMBUS_TIMEOUT; |
| 234 | int ret, bytes = 0; |
| 235 | int is_write_cmd = flags & BLOCK_WRITE; |
| 236 | int sw_drives_nak = flags & BLOCK_I2C; |
| 237 | |
| 238 | /* Hardware limitations. */ |
| 239 | if (flags == (BLOCK_WRITE | BLOCK_I2C)) |
| 240 | return SMBUS_ERROR; |
| 241 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 242 | /* Set number of bytes to transfer. */ |
| 243 | /* Reset number of bytes to transfer so we notice later it |
| 244 | * was really updated with the transaction. */ |
| 245 | if (!sw_drives_nak) { |
| 246 | if (is_write_cmd) |
| 247 | outb(max_bytes, smbus_base + SMBHSTDAT0); |
| 248 | else |
| 249 | outb(0, smbus_base + SMBHSTDAT0); |
| 250 | } |
| 251 | |
| 252 | /* Send first byte from buffer, bytes_sent increments after |
| 253 | * hardware acknowledges it. |
| 254 | */ |
| 255 | if (is_write_cmd) |
| 256 | outb(*buf++, smbus_base + SMBBLKDAT); |
| 257 | |
| 258 | /* Start the command */ |
| 259 | ret = execute_command(smbus_base); |
| 260 | if (ret < 0) |
| 261 | return ret; |
| 262 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 263 | /* Poll for transaction completion */ |
| 264 | do { |
| 265 | status = inb(smbus_base + SMBHSTSTAT); |
| 266 | |
| 267 | if (status & SMBHSTSTS_BYTE_DONE) { /* Byte done */ |
| 268 | |
| 269 | if (is_write_cmd) { |
| 270 | bytes++; |
| 271 | if (bytes < max_bytes) |
| 272 | outb(*buf++, smbus_base + SMBBLKDAT); |
| 273 | } else { |
| 274 | if (bytes < max_bytes) |
| 275 | *buf++ = inb(smbus_base + SMBBLKDAT); |
| 276 | bytes++; |
| 277 | |
| 278 | /* Indicate that next byte is the last one. */ |
| 279 | if (sw_drives_nak && (bytes + 1 >= max_bytes)) { |
| 280 | outb(inb(smbus_base + SMBHSTCTL) |
| 281 | | SMBHSTCNT_LAST_BYTE, |
| 282 | smbus_base + SMBHSTCTL); |
| 283 | } |
| 284 | |
| 285 | } |
| 286 | |
| 287 | /* Engine internally completes the transaction |
| 288 | * and clears HOST_BUSY flag once the byte count |
| 289 | * has been reached or LAST_BYTE was set. |
| 290 | */ |
| 291 | outb(SMBHSTSTS_BYTE_DONE, smbus_base + SMBHSTSTAT); |
| 292 | } |
| 293 | |
| 294 | } while (--loops && !host_completed(status)); |
| 295 | |
| 296 | dprintk("%s: status = %02x, len = %d / %d, loops = %d\n", |
| 297 | __func__, status, bytes, max_bytes, SMBUS_TIMEOUT - loops); |
| 298 | |
| 299 | if (loops == 0) |
| 300 | return recover_master(smbus_base, |
| 301 | SMBUS_WAIT_UNTIL_DONE_TIMEOUT); |
| 302 | |
| 303 | ret = cb_err_from_stat(status); |
| 304 | if (ret < 0) |
| 305 | return ret; |
| 306 | |
| 307 | return bytes; |
| 308 | } |
| 309 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 310 | int do_smbus_block_read(unsigned int smbus_base, u8 device, u8 cmd, |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 311 | unsigned int max_bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 312 | { |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 313 | int ret, slave_bytes; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 314 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 315 | max_bytes = MIN(SMBUS_BLOCK_MAXLEN, max_bytes); |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 316 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 317 | /* Set up for a block data read. */ |
| 318 | ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_READ(device)); |
| 319 | if (ret < 0) |
| 320 | return ret; |
| 321 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 322 | /* Set the command/address... */ |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 323 | outb(cmd, smbus_base + SMBHSTCMD); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 324 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 325 | /* Execute block transaction. */ |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 326 | ret = block_cmd_loop(smbus_base, buf, max_bytes, BLOCK_READ); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 327 | if (ret < 0) |
| 328 | return ret; |
| 329 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 330 | /* Post-check we received complete message. */ |
| 331 | slave_bytes = inb(smbus_base + SMBHSTDAT0); |
| 332 | if (ret < slave_bytes) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 333 | return SMBUS_ERROR; |
| 334 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 335 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 336 | } |
| 337 | |
| 338 | int do_smbus_block_write(unsigned int smbus_base, u8 device, u8 cmd, |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 339 | const unsigned int bytes, const u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 340 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 341 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 342 | |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 343 | if (bytes > SMBUS_BLOCK_MAXLEN) |
Arthur Heymans | 1b04aa2 | 2017-08-04 14:28:50 +0200 | [diff] [blame] | 344 | return SMBUS_ERROR; |
| 345 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 346 | /* Set up for a block data write. */ |
| 347 | ret = setup_command(smbus_base, I801_BLOCK_DATA, XMIT_WRITE(device)); |
| 348 | if (ret < 0) |
| 349 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 350 | |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 351 | /* Set the command/address... */ |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 352 | outb(cmd, smbus_base + SMBHSTCMD); |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 353 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 354 | /* Execute block transaction. */ |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 355 | ret = block_cmd_loop(smbus_base, (u8 *)buf, bytes, BLOCK_WRITE); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 356 | if (ret < 0) |
| 357 | return ret; |
| 358 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 359 | if (ret < bytes) |
Kyösti Mälkki | c17e855 | 2017-08-20 23:48:23 +0300 | [diff] [blame] | 360 | return SMBUS_ERROR; |
| 361 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 362 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 363 | } |
| 364 | |
| 365 | /* Only since ICH5 */ |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 366 | static int has_i2c_read_command(void) |
| 367 | { |
| 368 | if (IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82371EB) || |
| 369 | IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801DX)) |
| 370 | return 0; |
| 371 | return 1; |
| 372 | } |
| 373 | |
| 374 | int do_i2c_eeprom_read(unsigned int smbus_base, u8 device, |
Kyösti Mälkki | 1e39236 | 2017-08-20 21:36:03 +0300 | [diff] [blame] | 375 | unsigned int offset, const unsigned int bytes, u8 *buf) |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 376 | { |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 377 | int ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 378 | |
Kyösti Mälkki | c01a505 | 2019-01-30 09:39:23 +0200 | [diff] [blame] | 379 | if (!has_i2c_read_command()) |
| 380 | return SMBUS_ERROR; |
| 381 | |
Kyösti Mälkki | 957511c | 2017-08-20 21:36:11 +0300 | [diff] [blame] | 382 | /* Set up for a i2c block data read. |
| 383 | * |
| 384 | * FIXME: Address parameter changes to XMIT_READ(device) with |
| 385 | * some revision of PCH. Presumably hardware revisions that |
| 386 | * do not have i2c block write support internally set LSB. |
| 387 | */ |
| 388 | ret = setup_command(smbus_base, I801_I2C_BLOCK_DATA, |
| 389 | XMIT_WRITE(device)); |
| 390 | if (ret < 0) |
| 391 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 392 | |
| 393 | /* device offset */ |
| 394 | outb(offset, smbus_base + SMBHSTDAT1); |
| 395 | |
Kyösti Mälkki | d6c15d0 | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 396 | /* Execute block transaction. */ |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 397 | ret = block_cmd_loop(smbus_base, buf, bytes, BLOCK_READ | BLOCK_I2C); |
Kyösti Mälkki | c38d543 | 2017-08-20 21:36:18 +0300 | [diff] [blame] | 398 | if (ret < 0) |
| 399 | return ret; |
| 400 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 401 | /* Post-check we received complete message. */ |
| 402 | if (ret < bytes) |
Kyösti Mälkki | 1e39236 | 2017-08-20 21:36:03 +0300 | [diff] [blame] | 403 | return SMBUS_ERROR; |
| 404 | |
Kyösti Mälkki | 893edee | 2017-08-20 21:36:24 +0300 | [diff] [blame] | 405 | return ret; |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 406 | } |