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Stefan Reinauer278534d2008-10-29 04:51:07 +00001/*
2 * This file is part of the coreboot project.
3 *
Stefan Reinauer43b29cf2009-03-06 19:11:52 +00004 * Copyright (C) 2007-2009 coresystems GmbH
Stefan Reinauer278534d2008-10-29 04:51:07 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Stefan Reinauer278534d2008-10-29 04:51:07 +000014 */
15
Arthur Heymans17ad4592018-08-06 15:35:28 +020016#include <cbmem.h>
Stefan Reinauer278534d2008-10-29 04:51:07 +000017#include <console/console.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +020018#include <device/pci_ops.h>
Stefan Reinauer278534d2008-10-29 04:51:07 +000019#include <stdint.h>
20#include <device/device.h>
21#include <device/pci.h>
22#include <device/pci_ids.h>
Stefan Reinauer278534d2008-10-29 04:51:07 +000023#include <stdlib.h>
Stefan Reinauer278534d2008-10-29 04:51:07 +000024#include <cpu/cpu.h>
Stefan Reinauerab872542011-10-14 15:18:29 -070025#include <arch/acpi.h>
Arthur Heymanscf3076e2018-04-10 12:57:42 +020026#include <cpu/intel/smm/gen1/smi.h>
Stefan Reinauer278534d2008-10-29 04:51:07 +000027#include "i945.h"
28
Kyösti Mälkkie25b5ef2016-12-02 08:56:05 +020029static int get_pcie_bar(u32 *base)
Stefan Reinauer71a3d962009-07-21 21:44:24 +000030{
Elyes HAOUAS658a9342018-02-08 14:46:22 +010031 struct device *dev;
Stefan Reinauer71a3d962009-07-21 21:44:24 +000032 u32 pciexbar_reg;
33
34 *base = 0;
Stefan Reinauer71a3d962009-07-21 21:44:24 +000035
Kyösti Mälkkic70eed12018-05-22 02:18:00 +030036 dev = pcidev_on_root(0, 0);
Stefan Reinauer71a3d962009-07-21 21:44:24 +000037 if (!dev)
38 return 0;
Stefan Reinauer109ab312009-08-12 16:08:05 +000039
Stefan Reinaueraca6ec62009-10-26 17:12:21 +000040 pciexbar_reg = pci_read_config32(dev, PCIEXBAR);
Stefan Reinauer71a3d962009-07-21 21:44:24 +000041
42 if (!(pciexbar_reg & (1 << 0)))
43 return 0;
44
45 switch ((pciexbar_reg >> 1) & 3) {
46 case 0: // 256MB
47 *base = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28));
Kyösti Mälkkie25b5ef2016-12-02 08:56:05 +020048 return 256;
Stefan Reinauer71a3d962009-07-21 21:44:24 +000049 case 1: // 128M
50 *base = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27));
Kyösti Mälkkie25b5ef2016-12-02 08:56:05 +020051 return 128;
Stefan Reinauer71a3d962009-07-21 21:44:24 +000052 case 2: // 64M
53 *base = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28)|(1 << 27)|(1 << 26));
Kyösti Mälkkie25b5ef2016-12-02 08:56:05 +020054 return 64;
Stefan Reinauer71a3d962009-07-21 21:44:24 +000055 }
56
57 return 0;
58}
59
Arthur Heymans794f56b2018-06-15 19:37:23 +020060static void mch_domain_read_resources(struct device *dev)
Stefan Reinauer278534d2008-10-29 04:51:07 +000061{
Arthur Heymans17ad4592018-08-06 15:35:28 +020062 uint32_t pci_tolm, tseg_sizek, cbmem_topk, delta_cbmem;
Arthur Heymansf6d14772018-01-26 11:50:04 +010063 uint8_t tolud;
Stefan Reinauer278534d2008-10-29 04:51:07 +000064 uint16_t reg16;
Kyösti Mälkki6ff1d362012-07-27 08:42:20 +030065 unsigned long long tomk, tomk_stolen;
Kyösti Mälkkif7bfc342013-10-18 11:02:46 +030066 uint64_t uma_memory_base = 0, uma_memory_size = 0;
Kyösti Mälkki6ff1d362012-07-27 08:42:20 +030067 uint64_t tseg_memory_base = 0, tseg_memory_size = 0;
Nico Huber4e008c62019-01-12 15:28:43 +010068 struct device *const d0f0 = pcidev_on_root(0, 0);
Stefan Reinauer278534d2008-10-29 04:51:07 +000069
Arthur Heymans794f56b2018-06-15 19:37:23 +020070 pci_domain_read_resources(dev);
71
Stefan Reinauer71a3d962009-07-21 21:44:24 +000072 /* Can we find out how much memory we can use at most
73 * this way?
74 */
Myles Watson894a3472010-06-09 22:41:35 +000075 pci_tolm = find_pci_tolm(dev->link_list);
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000076 printk(BIOS_DEBUG, "pci_tolm: 0x%x\n", pci_tolm);
Stefan Reinauer278534d2008-10-29 04:51:07 +000077
Nico Huber4e008c62019-01-12 15:28:43 +010078 tolud = pci_read_config8(d0f0, TOLUD);
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000079 printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08x\n", tolud << 24);
Stefan Reinauer278534d2008-10-29 04:51:07 +000080
81 tomk = tolud << 14;
Kyösti Mälkki6ff1d362012-07-27 08:42:20 +030082 tomk_stolen = tomk;
Stefan Reinauer278534d2008-10-29 04:51:07 +000083
84 /* Note: subtract IGD device and TSEG */
Nico Huber4e008c62019-01-12 15:28:43 +010085 reg16 = pci_read_config16(d0f0, GGC);
Kyösti Mälkki15935eb2014-05-31 16:07:14 +030086 if (!(reg16 & 2)) {
Kyösti Mälkki15935eb2014-05-31 16:07:14 +030087 printk(BIOS_DEBUG, "IGD decoded, subtracting ");
Arthur Heymans874a8f92016-05-19 16:06:09 +020088 int uma_size = decode_igd_memory_size((reg16 >> 4) & 7);
Kyösti Mälkki15935eb2014-05-31 16:07:14 +030089
90 printk(BIOS_DEBUG, "%dM UMA\n", uma_size >> 10);
91 tomk_stolen -= uma_size;
92
93 /* For reserving UMA memory in the memory map */
94 uma_memory_base = tomk_stolen * 1024ULL;
95 uma_memory_size = uma_size * 1024ULL;
Nico Huber4e008c62019-01-12 15:28:43 +010096
97 printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n",
98 (unsigned int)uma_memory_base);
Kyösti Mälkki15935eb2014-05-31 16:07:14 +030099 }
100
Nico Huber4e008c62019-01-12 15:28:43 +0100101 tseg_sizek = decode_tseg_size(pci_read_config8(d0f0, ESMRAMC)) >> 10;
Arthur Heymansf6d14772018-01-26 11:50:04 +0100102 printk(BIOS_DEBUG, "TSEG decoded, subtracting %dM\n", tseg_sizek >> 10);
103 tomk_stolen -= tseg_sizek;
104 tseg_memory_base = tomk_stolen * 1024ULL;
105 tseg_memory_size = tseg_sizek * 1024ULL;
Stefan Reinauer278534d2008-10-29 04:51:07 +0000106
Arthur Heymans17ad4592018-08-06 15:35:28 +0200107 /* cbmem_top can be shifted downwards due to alignment.
108 Mark the region between cbmem_top and tomk as unusable */
109 cbmem_topk = ((uint32_t)cbmem_top() >> 10);
110 delta_cbmem = tomk_stolen - cbmem_topk;
111 tomk_stolen -= delta_cbmem;
112
113 printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%xK\n",
114 delta_cbmem);
115
116
Stefan Reinauer278534d2008-10-29 04:51:07 +0000117 /* The following needs to be 2 lines, otherwise the second
118 * number is always 0
119 */
Kyösti Mälkki6ff1d362012-07-27 08:42:20 +0300120 printk(BIOS_INFO, "Available memory: %dK", (uint32_t)tomk_stolen);
121 printk(BIOS_INFO, " (%dM)\n", (uint32_t)(tomk_stolen >> 10));
Stefan Reinauer278534d2008-10-29 04:51:07 +0000122
123 /* Report the memory regions */
124 ram_resource(dev, 3, 0, 640);
Stefan Reinauer3c7f46b2009-02-27 23:09:55 +0000125 ram_resource(dev, 4, 768, (tomk - 768));
Kyösti Mälkki6ff1d362012-07-27 08:42:20 +0300126 uma_resource(dev, 5, uma_memory_base >> 10, uma_memory_size >> 10);
127 mmio_resource(dev, 6, tseg_memory_base >> 10, tseg_memory_size >> 10);
Arthur Heymans17ad4592018-08-06 15:35:28 +0200128 uma_resource(dev, 7, cbmem_topk, delta_cbmem);
Arthur Heymans794f56b2018-06-15 19:37:23 +0200129}
130
131static void mch_domain_set_resources(struct device *dev)
132{
133 struct resource *res;
134
135 for (res = dev->resource_list; res; res = res->next)
136 report_resource_stored(dev, res, "");
Kyösti Mälkki6ff1d362012-07-27 08:42:20 +0300137
Myles Watson894a3472010-06-09 22:41:35 +0000138 assign_resources(dev->link_list);
Stefan Reinauer278534d2008-10-29 04:51:07 +0000139}
140
Arthur Heymansa8a9f342017-12-24 08:11:13 +0100141static const char *northbridge_acpi_name(const struct device *dev)
142{
143 if (dev->path.type == DEVICE_PATH_DOMAIN)
144 return "PCI0";
145
146 if (dev->path.type != DEVICE_PATH_PCI || dev->bus->secondary != 0)
147 return NULL;
148
149 switch (dev->path.pci.devfn) {
150 case PCI_DEVFN(0, 0):
151 return "MCHC";
152 }
153
154 return NULL;
155}
156
Arthur Heymanscf3076e2018-04-10 12:57:42 +0200157void northbridge_write_smram(u8 smram)
158{
Kyösti Mälkkic70eed12018-05-22 02:18:00 +0300159 struct device *dev = pcidev_on_root(0, 0);
Arthur Heymanscf3076e2018-04-10 12:57:42 +0200160
161 if (dev == NULL)
162 die("could not find pci 00:00.0!\n");
163
164 pci_write_config8(dev, SMRAM, smram);
165}
166
Stefan Reinauer278534d2008-10-29 04:51:07 +0000167 /* TODO We could determine how many PCIe busses we need in
168 * the bar. For now that number is hardcoded to a max of 64.
Myles Watson29cc9ed2009-07-02 18:56:24 +0000169 * See e7525/northbridge.c for an example.
Stefan Reinauer278534d2008-10-29 04:51:07 +0000170 */
Stefan Reinauer278534d2008-10-29 04:51:07 +0000171static struct device_operations pci_domain_ops = {
Arthur Heymans794f56b2018-06-15 19:37:23 +0200172 .read_resources = mch_domain_read_resources,
173 .set_resources = mch_domain_set_resources,
Myles Watson7eac4452010-06-17 16:16:56 +0000174 .enable_resources = NULL,
175 .init = NULL,
Stefan Reinauer278534d2008-10-29 04:51:07 +0000176 .scan_bus = pci_domain_scan_bus,
Arthur Heymansa8a9f342017-12-24 08:11:13 +0100177 .acpi_name = northbridge_acpi_name,
Stefan Reinauer278534d2008-10-29 04:51:07 +0000178};
179
Elyes HAOUAS658a9342018-02-08 14:46:22 +0100180static void mc_read_resources(struct device *dev)
Stefan Reinauer278534d2008-10-29 04:51:07 +0000181{
Kyösti Mälkkie25b5ef2016-12-02 08:56:05 +0200182 u32 pcie_config_base;
183 int buses;
Stefan Reinauer278534d2008-10-29 04:51:07 +0000184
185 pci_dev_read_resources(dev);
186
Kyösti Mälkkie25b5ef2016-12-02 08:56:05 +0200187 buses = get_pcie_bar(&pcie_config_base);
188 if (buses) {
Kyösti Mälkki27198ac2016-12-02 14:38:13 +0200189 struct resource *resource = new_resource(dev, PCIEXBAR);
Kyösti Mälkkie25b5ef2016-12-02 08:56:05 +0200190 mmconf_resource_init(resource, pcie_config_base, buses);
191 }
Stefan Reinauer278534d2008-10-29 04:51:07 +0000192}
193
Stefan Reinauer278534d2008-10-29 04:51:07 +0000194static struct pci_operations intel_pci_ops = {
Subrata Banik4a0f0712019-03-20 14:29:47 +0530195 .set_subsystem = pci_dev_set_subsystem,
Stefan Reinauer278534d2008-10-29 04:51:07 +0000196};
197
198static struct device_operations mc_ops = {
199 .read_resources = mc_read_resources,
Kyösti Mälkki27198ac2016-12-02 14:38:13 +0200200 .set_resources = pci_dev_set_resources,
Stefan Reinauer278534d2008-10-29 04:51:07 +0000201 .enable_resources = pci_dev_enable_resources,
Vladimir Serbinenko0e646172014-08-31 00:27:05 +0200202 .acpi_fill_ssdt_generator = generate_cpu_entries,
Stefan Reinauer278534d2008-10-29 04:51:07 +0000203 .scan_bus = 0,
204 .ops_pci = &intel_pci_ops,
205};
206
Nico Huber04be6b52016-10-22 20:01:34 +0200207static const unsigned short pci_device_ids[] = {
208 0x2770, /* desktop */
209 0x27a0, 0x27ac, /* mobile */
210 0 };
Vladimir Serbinenkob67eaee2014-11-16 23:08:05 +0100211
Stefan Reinauer278534d2008-10-29 04:51:07 +0000212static const struct pci_driver mc_driver __pci_driver = {
213 .ops = &mc_ops,
214 .vendor = PCI_VENDOR_ID_INTEL,
Vladimir Serbinenkob67eaee2014-11-16 23:08:05 +0100215 .devices = pci_device_ids,
Stefan Reinauer278534d2008-10-29 04:51:07 +0000216};
217
Elyes HAOUAS658a9342018-02-08 14:46:22 +0100218static void cpu_bus_init(struct device *dev)
Stefan Reinauer278534d2008-10-29 04:51:07 +0000219{
Arthur Heymansf2669322018-04-10 15:15:05 +0200220 bsp_init_and_start_aps(dev->link_list);
Stefan Reinauer278534d2008-10-29 04:51:07 +0000221}
222
Stefan Reinauer278534d2008-10-29 04:51:07 +0000223static struct device_operations cpu_bus_ops = {
Edward O'Callaghan9f744622014-10-31 08:12:34 +1100224 .read_resources = DEVICE_NOOP,
225 .set_resources = DEVICE_NOOP,
226 .enable_resources = DEVICE_NOOP,
Stefan Reinauer278534d2008-10-29 04:51:07 +0000227 .init = cpu_bus_init,
228 .scan_bus = 0,
229};
230
Elyes HAOUAS658a9342018-02-08 14:46:22 +0100231static void enable_dev(struct device *dev)
Stefan Reinauer278534d2008-10-29 04:51:07 +0000232{
233 /* Set the operations if it is a special bus type */
Arthur Heymans70a8e342017-03-09 11:30:23 +0100234 if (dev->path.type == DEVICE_PATH_DOMAIN)
Stefan Reinauer278534d2008-10-29 04:51:07 +0000235 dev->ops = &pci_domain_ops;
Arthur Heymans70a8e342017-03-09 11:30:23 +0100236 else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER)
Stefan Reinauer278534d2008-10-29 04:51:07 +0000237 dev->ops = &cpu_bus_ops;
Stefan Reinauer278534d2008-10-29 04:51:07 +0000238}
239
240struct chip_operations northbridge_intel_i945_ops = {
241 CHIP_NAME("Intel i945 Northbridge")
242 .enable_dev = enable_dev,
243};