blob: 0c52d5258829c7565f34f7f45f36c667cd6a24b6 [file] [log] [blame]
Martin Roth58562402015-10-11 10:36:26 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2012 The Chromium OS Authors
6 * Copyright (C) 2013 Sage Electronic Engineering, LLC
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; version 2 of
11 * the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Martin Roth58562402015-10-11 10:36:26 +020017 */
18
19#include <types.h>
Martin Roth58562402015-10-11 10:36:26 +020020#include <arch/acpi.h>
21#include <device/device.h>
22#include <device/pci.h>
23#include <device/pci_ids.h>
Martin Roth58562402015-10-11 10:36:26 +020024#include <arch/acpigen.h>
Elyes HAOUASa1e22b82019-03-18 22:49:36 +010025
Martin Roth58562402015-10-11 10:36:26 +020026#include "northbridge.h"
27
28unsigned long acpi_fill_mcfg(unsigned long current)
29{
Elyes HAOUAS09d1d592018-02-09 08:38:14 +010030 struct device *dev;
Martin Roth58562402015-10-11 10:36:26 +020031 u32 pciexbar = 0;
32 u32 pciexbar_reg;
33 int max_buses;
34 int pci_dev_id;
35
36 for (pci_dev_id = PCI_DEVICE_ID_RG_MIN; pci_dev_id <= PCI_DEVICE_ID_RG_MAX; pci_dev_id++) {
37 dev = dev_find_device(PCI_VENDOR_ID_INTEL, pci_dev_id, 0);
38 if (dev)
39 break;
40 }
41
42 if (!dev)
43 return current;
44
45 pciexbar_reg = sideband_read(B_UNIT, BECREG);
46
47 /* MMCFG not supported or not enabled. */
48 if (!(pciexbar_reg & (1 << 0)))
49 return current;
50
51 /* 256MB ECAM range */
52 pciexbar = pciexbar_reg & ((1 << 31)|(1 << 30)|(1 << 29)|(1 << 28));
53 max_buses = 256;
54
55 current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current,
56 pciexbar, 0x0, 0x0, max_buses - 1);
57
58 return current;
59}
60
Elyes HAOUAS09d1d592018-02-09 08:38:14 +010061void northbridge_acpi_fill_ssdt_generator(struct device *device)
Martin Roth58562402015-10-11 10:36:26 +020062{
63 u32 bmbound;
64 char pscope[] = "\\_SB.PCI0";
65
66 bmbound = sideband_read(B_UNIT, BMBOUND);
67 acpigen_write_scope(pscope);
68 acpigen_write_name_dword("BMBD", bmbound);
69 acpigen_pop_len();
70 generate_cpu_entries(device);
71}