Ben Chuang | 026e940 | 2020-07-16 11:34:36 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | /* Driver for Genesys Logic GL9763E */ |
| 4 | |
| 5 | #include <console/console.h> |
| 6 | #include <device/device.h> |
| 7 | #include <device/path.h> |
| 8 | #include <device/pci.h> |
| 9 | #include <device/pci_ops.h> |
| 10 | #include <device/pci_ids.h> |
| 11 | #include "gl9763e.h" |
| 12 | |
| 13 | static void gl9763e_init(struct device *dev) |
| 14 | { |
Renius Chen | 43dec1a | 2020-12-28 10:31:34 +0800 | [diff] [blame] | 15 | uint32_t ver; |
| 16 | |
Ben Chuang | 026e940 | 2020-07-16 11:34:36 +0800 | [diff] [blame] | 17 | printk(BIOS_INFO, "GL9763E: init\n"); |
| 18 | pci_dev_init(dev); |
| 19 | |
| 20 | /* Set VHS (Vendor Header Space) to be writable */ |
| 21 | pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_W); |
| 22 | /* Set single AXI request */ |
| 23 | pci_or_config32(dev, SCR, SCR_AXI_REQ); |
| 24 | /* Disable L0s support */ |
| 25 | pci_and_config32(dev, CFG_REG_2, ~CFG_REG_2_L0S); |
| 26 | /* Set SSC to 30000 ppm */ |
| 27 | pci_update_config32(dev, PLL_CTL_2, ~PLL_CTL_2_MAX_SSC_MASK, MAX_SSC_30000PPM); |
| 28 | /* Enable SSC */ |
| 29 | pci_or_config32(dev, PLL_CTL, PLL_CTL_SSC); |
Renius Chen | 43dec1a | 2020-12-28 10:31:34 +0800 | [diff] [blame] | 30 | /* Check chip version */ |
| 31 | ver = pci_read_config32(dev, HW_VER_2); |
| 32 | if ((ver & HW_VER_MASK) == REVISION_03) { |
| 33 | /* Set clock source for RX path */ |
| 34 | pci_update_config32(dev, SD_CLKRX_DLY, ~CLK_SRC_MASK, AFTER_OUTPUT_BUFF); |
| 35 | } |
Ben Chuang | 1b7f63f | 2021-01-04 15:39:28 +0800 | [diff] [blame] | 36 | /* Modify DS delay */ |
| 37 | pci_update_config32(dev, SD_CLKRX_DLY, ~HS400_RX_DELAY_MASK, HS400_RX_DELAY); |
| 38 | /* Disable Slow mode */ |
| 39 | pci_and_config32(dev, EMMC_CTL, ~SLOW_MODE); |
Ben Chuang | 026e940 | 2020-07-16 11:34:36 +0800 | [diff] [blame] | 40 | /* Set VHS to read-only */ |
| 41 | pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_R); |
| 42 | } |
| 43 | |
| 44 | static struct device_operations gl9763e_ops = { |
| 45 | .read_resources = pci_dev_read_resources, |
| 46 | .set_resources = pci_dev_set_resources, |
| 47 | .enable_resources = pci_dev_enable_resources, |
| 48 | .ops_pci = &pci_dev_ops_pci, |
| 49 | .init = gl9763e_init, |
| 50 | }; |
| 51 | |
| 52 | static const unsigned short pci_device_ids[] = { |
| 53 | PCI_DEVICE_ID_GLI_9763E, |
| 54 | 0 |
| 55 | }; |
| 56 | |
| 57 | static const struct pci_driver genesyslogic_gl9763e __pci_driver = { |
| 58 | .ops = &gl9763e_ops, |
| 59 | .vendor = PCI_VENDOR_ID_GLI, |
| 60 | .devices = pci_device_ids, |
| 61 | }; |
| 62 | |
| 63 | struct chip_operations drivers_generic_genesyslogic_ops = { |
| 64 | CHIP_NAME("Genesys Logic GL9763E") |
| 65 | }; |