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Aaron Durbindc9f5cd2015-09-08 13:34:43 -05001#ifndef COMMONLIB_COREBOOT_TABLES_H
2#define COMMONLIB_COREBOOT_TABLES_H
3
4#include <stdint.h>
5
6/* The coreboot table information is for conveying information
7 * from the firmware to the loaded OS image. Primarily this
8 * is expected to be information that cannot be discovered by
9 * other means, such as querying the hardware directly.
10 *
11 * All of the information should be Position Independent Data.
12 * That is it should be safe to relocated any of the information
13 * without it's meaning/correctness changing. For table that
14 * can reasonably be used on multiple architectures the data
15 * size should be fixed. This should ease the transition between
16 * 32 bit and 64 bit architectures etc.
17 *
18 * The completeness test for the information in this table is:
19 * - Can all of the hardware be detected?
20 * - Are the per motherboard constants available?
21 * - Is there enough to allow a kernel to run that was written before
22 * a particular motherboard is constructed? (Assuming the kernel
23 * has drivers for all of the hardware but it does not have
24 * assumptions on how the hardware is connected together).
25 *
26 * With this test it should be straight forward to determine if a
27 * table entry is required or not. This should remove much of the
28 * long term compatibility burden as table entries which are
29 * irrelevant or have been replaced by better alternatives may be
30 * dropped. Of course it is polite and expedite to include extra
31 * table entries and be backwards compatible, but it is not required.
32 */
33
34/* Since coreboot is usually compiled 32bit, gcc will align 64bit
35 * types to 32bit boundaries. If the coreboot table is dumped on a
36 * 64bit system, a uint64_t would be aligned to 64bit boundaries,
37 * breaking the table format.
38 *
39 * lb_uint64 will keep 64bit coreboot table values aligned to 32bit
40 * to ensure compatibility. They can be accessed with the two functions
41 * below: unpack_lb64() and pack_lb64()
42 *
43 * See also: util/lbtdump/lbtdump.c
44 */
45
46struct lb_uint64 {
47 uint32_t lo;
48 uint32_t hi;
49};
50
51static inline uint64_t unpack_lb64(struct lb_uint64 value)
52{
53 uint64_t result;
54 result = value.hi;
55 result = (result << 32) + value.lo;
56 return result;
57}
58
59static inline struct lb_uint64 pack_lb64(uint64_t value)
60{
61 struct lb_uint64 result;
62 result.lo = (value >> 0) & 0xffffffff;
63 result.hi = (value >> 32) & 0xffffffff;
64 return result;
65}
66
67struct lb_header
68{
69 uint8_t signature[4]; /* LBIO */
70 uint32_t header_bytes;
71 uint32_t header_checksum;
72 uint32_t table_bytes;
73 uint32_t table_checksum;
74 uint32_t table_entries;
75};
76
77/* Every entry in the boot environment list will correspond to a boot
78 * info record. Encoding both type and size. The type is obviously
79 * so you can tell what it is. The size allows you to skip that
80 * boot environment record if you don't know what it is. This allows
81 * forward compatibility with records not yet defined.
82 */
83struct lb_record {
84 uint32_t tag; /* tag ID */
85 uint32_t size; /* size of record (in bytes) */
86};
87
88#define LB_TAG_UNUSED 0x0000
89
90#define LB_TAG_MEMORY 0x0001
91
92struct lb_memory_range {
93 struct lb_uint64 start;
94 struct lb_uint64 size;
95 uint32_t type;
96#define LB_MEM_RAM 1 /* Memory anyone can use */
97#define LB_MEM_RESERVED 2 /* Don't use this memory region */
98#define LB_MEM_ACPI 3 /* ACPI Tables */
99#define LB_MEM_NVS 4 /* ACPI NVS Memory */
100#define LB_MEM_UNUSABLE 5 /* Unusable address space */
101#define LB_MEM_VENDOR_RSVD 6 /* Vendor Reserved */
102#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */
103};
104
105struct lb_memory {
106 uint32_t tag;
107 uint32_t size;
108 struct lb_memory_range map[0];
109};
110
111#define LB_TAG_HWRPB 0x0002
112struct lb_hwrpb {
113 uint32_t tag;
114 uint32_t size;
115 uint64_t hwrpb;
116};
117
118#define LB_TAG_MAINBOARD 0x0003
119struct lb_mainboard {
120 uint32_t tag;
121 uint32_t size;
122 uint8_t vendor_idx;
123 uint8_t part_number_idx;
124 uint8_t strings[0];
125};
126
127#define LB_TAG_VERSION 0x0004
128#define LB_TAG_EXTRA_VERSION 0x0005
129#define LB_TAG_BUILD 0x0006
130#define LB_TAG_COMPILE_TIME 0x0007
131#define LB_TAG_COMPILE_BY 0x0008
132#define LB_TAG_COMPILE_HOST 0x0009
133#define LB_TAG_COMPILE_DOMAIN 0x000a
134#define LB_TAG_COMPILER 0x000b
135#define LB_TAG_LINKER 0x000c
136#define LB_TAG_ASSEMBLER 0x000d
137struct lb_string {
138 uint32_t tag;
139 uint32_t size;
140 uint8_t string[0];
141};
142
143#define LB_TAG_VERSION_TIMESTAMP 0x0026
144struct lb_timestamp {
145 uint32_t tag;
146 uint32_t size;
147 uint32_t timestamp;
148};
149
150
151/* 0xe is taken by v3 */
152
153#define LB_TAG_SERIAL 0x000f
154struct lb_serial {
155 uint32_t tag;
156 uint32_t size;
157#define LB_SERIAL_TYPE_IO_MAPPED 1
158#define LB_SERIAL_TYPE_MEMORY_MAPPED 2
159 uint32_t type;
160 uint32_t baseaddr;
161 uint32_t baud;
162 uint32_t regwidth;
163};
164
165#define LB_TAG_CONSOLE 0x0010
166struct lb_console {
167 uint32_t tag;
168 uint32_t size;
169 uint16_t type;
170};
171
172#define LB_TAG_CONSOLE_SERIAL8250 0
173#define LB_TAG_CONSOLE_VGA 1 // OBSOLETE
174#define LB_TAG_CONSOLE_BTEXT 2 // OBSOLETE
175#define LB_TAG_CONSOLE_LOGBUF 3 // OBSOLETE
176#define LB_TAG_CONSOLE_SROM 4 // OBSOLETE
177#define LB_TAG_CONSOLE_EHCI 5
178#define LB_TAG_CONSOLE_SERIAL8250MEM 6
179
180#define LB_TAG_FORWARD 0x0011
181struct lb_forward {
182 uint32_t tag;
183 uint32_t size;
184 uint64_t forward;
185};
186
187#define LB_TAG_FRAMEBUFFER 0x0012
188struct lb_framebuffer {
189 uint32_t tag;
190 uint32_t size;
191
192 uint64_t physical_address;
193 uint32_t x_resolution;
194 uint32_t y_resolution;
195 uint32_t bytes_per_line;
196 uint8_t bits_per_pixel;
197 uint8_t red_mask_pos;
198 uint8_t red_mask_size;
199 uint8_t green_mask_pos;
200 uint8_t green_mask_size;
201 uint8_t blue_mask_pos;
202 uint8_t blue_mask_size;
203 uint8_t reserved_mask_pos;
204 uint8_t reserved_mask_size;
205};
206
207#define LB_TAG_GPIO 0x0013
208
209struct lb_gpio {
210 uint32_t port;
211 uint32_t polarity;
212#define ACTIVE_LOW 0
213#define ACTIVE_HIGH 1
214 uint32_t value;
215#define GPIO_MAX_NAME_LENGTH 16
216 uint8_t name[GPIO_MAX_NAME_LENGTH];
217};
218
219struct lb_gpios {
220 uint32_t tag;
221 uint32_t size;
222
223 uint32_t count;
224 struct lb_gpio gpios[0];
225};
226
227#define LB_TAG_VDAT 0x0015
228#define LB_TAG_VBNV 0x0019
229#define LB_TAB_VBOOT_HANDOFF 0x0020
230#define LB_TAB_DMA 0x0022
231#define LB_TAG_RAM_OOPS 0x0023
232#define LB_TAG_MTC 0x002b
233struct lb_range {
234 uint32_t tag;
235 uint32_t size;
236
237 uint64_t range_start;
238 uint32_t range_size;
239};
240
241void lb_ramoops(struct lb_header *header);
242
243#define LB_TAG_TIMESTAMPS 0x0016
244#define LB_TAG_CBMEM_CONSOLE 0x0017
245#define LB_TAG_MRC_CACHE 0x0018
246#define LB_TAG_ACPI_GNVS 0x0024
247#define LB_TAG_WIFI_CALIBRATION 0x0027
Hung-Te Linb15a0d02015-07-13 15:49:57 +0800248#define LB_TAG_VPD 0x002c
Aaron Durbindc9f5cd2015-09-08 13:34:43 -0500249struct lb_cbmem_ref {
250 uint32_t tag;
251 uint32_t size;
252
253 uint64_t cbmem_addr;
254};
255
256#define LB_TAG_X86_ROM_MTRR 0x0021
257struct lb_x86_rom_mtrr {
258 uint32_t tag;
259 uint32_t size;
260 /* The variable range MTRR index covering the ROM. */
261 uint32_t index;
262};
263
264#define LB_TAG_BOARD_ID 0x0025
265struct lb_board_id {
266 uint32_t tag;
267 uint32_t size;
268 /* Board ID as retrieved from the board revision GPIOs. */
269 uint32_t board_id;
270};
271
272#define LB_TAG_MAC_ADDRS 0x0026
273struct mac_address {
274 uint8_t mac_addr[6];
275 uint8_t pad[2]; /* Pad it to 8 bytes to keep it simple. */
276};
277
278struct lb_macs {
279 uint32_t tag;
280 uint32_t size;
281 uint32_t count;
282 struct mac_address mac_addrs[0];
283};
284
285#define LB_TAG_RAM_CODE 0x0028
286struct lb_ram_code {
287 uint32_t tag;
288 uint32_t size;
289 uint32_t ram_code;
290};
291
292#define LB_TAG_SPI_FLASH 0x0029
293struct lb_spi_flash {
294 uint32_t tag;
295 uint32_t size;
296 uint32_t flash_size;
297 uint32_t sector_size;
298 uint32_t erase_cmd;
299};
300
301#define LB_TAG_BOOT_MEDIA_PARAMS 0x0030
302struct lb_boot_media_params {
303 uint32_t tag;
304 uint32_t size;
305 /* offsets are relative to start of boot media */
306 uint64_t fmap_offset;
307 uint64_t cbfs_offset;
308 uint64_t cbfs_size;
309 uint64_t boot_media_size;
310};
311
Aaron Durbin1ca2d862015-09-30 12:26:54 -0500312/*
313 * There can be more than one of these records as there is one per cbmem entry.
314 */
315#define LB_TAG_CBMEM_ENTRY 0x0031
316struct lb_cbmem_entry {
317 uint32_t tag;
318 uint32_t size;
319
320 uint64_t address;
321 uint32_t entry_size;
322 uint32_t id;
323};
324
Aaron Durbindc9f5cd2015-09-08 13:34:43 -0500325#define LB_TAG_SERIALNO 0x002a
326#define MAX_SERIALNO_LENGTH 32
327
328/* The following structures are for the cmos definitions table */
329#define LB_TAG_CMOS_OPTION_TABLE 200
330/* cmos header record */
331struct cmos_option_table {
332 uint32_t tag; /* CMOS definitions table type */
333 uint32_t size; /* size of the entire table */
334 uint32_t header_length; /* length of header */
335};
336
337/* cmos entry record
338 This record is variable length. The name field may be
339 shorter than CMOS_MAX_NAME_LENGTH. The entry may start
340 anywhere in the byte, but can not span bytes unless it
341 starts at the beginning of the byte and the length is
342 fills complete bytes.
343*/
344#define LB_TAG_OPTION 201
345struct cmos_entries {
346 uint32_t tag; /* entry type */
347 uint32_t size; /* length of this record */
348 uint32_t bit; /* starting bit from start of image */
349 uint32_t length; /* length of field in bits */
350 uint32_t config; /* e=enumeration, h=hex, r=reserved */
351 uint32_t config_id; /* a number linking to an enumeration record */
352#define CMOS_MAX_NAME_LENGTH 32
353 uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
354 variable length int aligned */
355};
356
357
358/* cmos enumerations record
359 This record is variable length. The text field may be
360 shorter than CMOS_MAX_TEXT_LENGTH.
361*/
362#define LB_TAG_OPTION_ENUM 202
363struct cmos_enums {
364 uint32_t tag; /* enumeration type */
365 uint32_t size; /* length of this record */
366 uint32_t config_id; /* a number identifying the config id */
367 uint32_t value; /* the value associated with the text */
368#define CMOS_MAX_TEXT_LENGTH 32
369 uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
370 variable length int aligned */
371};
372
373/* cmos defaults record
374 This record contains default settings for the cmos ram.
375*/
376#define LB_TAG_OPTION_DEFAULTS 203
377struct cmos_defaults {
378 uint32_t tag; /* default type */
379 uint32_t size; /* length of this record */
380 uint32_t name_length; /* length of the following name field */
381 uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name identifying the default */
382#define CMOS_IMAGE_BUFFER_SIZE 256
383 uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE]; /* default settings */
384};
385
386#define LB_TAG_OPTION_CHECKSUM 204
387struct cmos_checksum {
388 uint32_t tag;
389 uint32_t size;
390 /* In practice everything is byte aligned, but things are measured
391 * in bits to be consistent.
392 */
393 uint32_t range_start; /* First bit that is checksummed (byte aligned) */
394 uint32_t range_end; /* Last bit that is checksummed (byte aligned) */
395 uint32_t location; /* First bit of the checksum (byte aligned) */
396 uint32_t type; /* Checksum algorithm that is used */
397#define CHECKSUM_NONE 0
398#define CHECKSUM_PCBIOS 1
399};
400
401#endif