Rizwan Qureshi | 742c6fe | 2018-09-18 22:43:41 +0530 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2018 Intel Corp. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <assert.h> |
| 17 | #include <chip.h> |
| 18 | #include <console/console.h> |
| 19 | #include <fsp/util.h> |
| 20 | #include <soc/iomap.h> |
| 21 | #include <soc/pci_devs.h> |
| 22 | #include <soc/romstage.h> |
| 23 | |
| 24 | static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config) |
| 25 | { |
| 26 | unsigned int i; |
| 27 | uint32_t mask = 0; |
Lijian Zhao | fe701ee | 2018-10-25 09:29:10 -0700 | [diff] [blame] | 28 | const struct device *dev = dev_find_slot(0, PCH_DEVFN_ISH); |
Rizwan Qureshi | 742c6fe | 2018-09-18 22:43:41 +0530 | [diff] [blame] | 29 | |
| 30 | /* Set IGD stolen size to 64MB. */ |
| 31 | m_cfg->IgdDvmt50PreAlloc = 2; |
| 32 | m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE; |
| 33 | m_cfg->IedSize = CONFIG_IED_REGION_SIZE; |
| 34 | m_cfg->SaGv = config->SaGv; |
praveen hodagatta pranesh | 521e48c | 2018-09-27 00:00:13 +0800 | [diff] [blame] | 35 | if (IS_ENABLED(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H)) |
praveen hodagatta pranesh | e26c4a4 | 2018-09-20 03:49:45 +0800 | [diff] [blame] | 36 | m_cfg->UserBd = BOARD_TYPE_DESKTOP; |
| 37 | else |
| 38 | m_cfg->UserBd = BOARD_TYPE_ULT_ULX; |
Rizwan Qureshi | 742c6fe | 2018-09-18 22:43:41 +0530 | [diff] [blame] | 39 | m_cfg->RMT = config->RMT; |
| 40 | |
| 41 | for (i = 0; i < ARRAY_SIZE(config->PcieRpEnable); i++) { |
| 42 | if (config->PcieRpEnable[i]) |
| 43 | mask |= (1 << i); |
| 44 | } |
| 45 | m_cfg->PcieRpEnableMask = mask; |
| 46 | m_cfg->PrmrrSize = config->PrmrrSize; |
| 47 | m_cfg->EnableC6Dram = config->enable_c6dram; |
Rizwan Qureshi | 742c6fe | 2018-09-18 22:43:41 +0530 | [diff] [blame] | 48 | m_cfg->PcdSerialIoUartNumber = CONFIG_UART_FOR_CONSOLE; |
| 49 | /* Disable Vmx if Vt-d is already disabled */ |
| 50 | if (config->VtdDisable) |
| 51 | m_cfg->VmxEnable = 0; |
| 52 | else |
| 53 | m_cfg->VmxEnable = config->VmxEnable; |
| 54 | #if IS_ENABLED(CONFIG_SOC_INTEL_COFFEELAKE) |
| 55 | m_cfg->SkipMpInit = !chip_get_fsp_mp_init(); |
| 56 | #endif |
Lijian Zhao | fe701ee | 2018-10-25 09:29:10 -0700 | [diff] [blame] | 57 | /* If ISH is enabled, enable ISH elements */ |
| 58 | if (!dev) |
| 59 | m_cfg->PchIshEnable = 0; |
| 60 | else |
| 61 | m_cfg->PchIshEnable = dev->enabled; |
Rizwan Qureshi | 742c6fe | 2018-09-18 22:43:41 +0530 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) |
| 65 | { |
| 66 | const struct device *dev = dev_find_slot(0, PCH_DEVFN_LPC); |
Duncan Laurie | 25b387a | 2018-11-08 15:48:14 -0700 | [diff] [blame] | 67 | const struct device *smbus = dev_find_slot(0, PCH_DEVFN_SMBUS); |
Rizwan Qureshi | 742c6fe | 2018-09-18 22:43:41 +0530 | [diff] [blame] | 68 | assert(dev != NULL); |
| 69 | const config_t *config = dev->chip_info; |
| 70 | FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; |
| 71 | |
| 72 | soc_memory_init_params(m_cfg, config); |
| 73 | |
| 74 | /* Enable SMBus controller based on config */ |
Duncan Laurie | 25b387a | 2018-11-08 15:48:14 -0700 | [diff] [blame] | 75 | if (!smbus) |
| 76 | m_cfg->SmbusEnable = 0; |
| 77 | else |
| 78 | m_cfg->SmbusEnable = smbus->enabled; |
Rizwan Qureshi | 742c6fe | 2018-09-18 22:43:41 +0530 | [diff] [blame] | 79 | /* Set debug probe type */ |
| 80 | m_cfg->PlatformDebugConsent = config->DebugConsent; |
| 81 | |
| 82 | mainboard_memory_init_params(mupd); |
| 83 | } |
| 84 | |
| 85 | __weak void mainboard_memory_init_params(FSPM_UPD *mupd) |
| 86 | { |
| 87 | printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); |
| 88 | } |