Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 1 | |
| 2 | config CPU_INTEL_HASWELL |
| 3 | bool |
| 4 | |
| 5 | if CPU_INTEL_HASWELL |
| 6 | |
| 7 | config CPU_SPECIFIC_OPTIONS |
| 8 | def_bool y |
Furquan Shaikh | 99ac98f | 2014-04-23 10:18:48 -0700 | [diff] [blame] | 9 | select ARCH_BOOTBLOCK_X86_32 |
Stefan Reinauer | 77b1655 | 2015-01-14 19:51:47 +0100 | [diff] [blame] | 10 | select ARCH_VERSTAGE_X86_32 |
Furquan Shaikh | 99ac98f | 2014-04-23 10:18:48 -0700 | [diff] [blame] | 11 | select ARCH_ROMSTAGE_X86_32 |
| 12 | select ARCH_RAMSTAGE_X86_32 |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 13 | select SMP |
Matt DeVillier | 31769d9 | 2015-04-30 01:19:16 -0500 | [diff] [blame] | 14 | select MMX |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 15 | select SSE2 |
Aaron Durbin | 7cb1ba9 | 2013-05-01 15:39:28 -0500 | [diff] [blame] | 16 | select UDELAY_TSC |
| 17 | select TSC_CONSTANT_RATE |
Alexandru Gagniuc | 66e0c4c | 2013-12-04 22:21:15 -0600 | [diff] [blame] | 18 | select SUPPORT_CPU_UCODE_IN_CBFS |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 19 | #select AP_IN_SIPI_WAIT |
| 20 | select TSC_SYNC_MFENCE |
Aaron Durbin | 6dccedd | 2012-12-03 16:17:40 -0600 | [diff] [blame] | 21 | select CPU_INTEL_FIRMWARE_INTERFACE_TABLE |
Aaron Durbin | 014baea | 2014-03-28 22:01:05 -0500 | [diff] [blame] | 22 | select PARALLEL_MP |
Matt DeVillier | ed6fe2f | 2016-12-14 16:12:43 -0600 | [diff] [blame] | 23 | select CPU_INTEL_COMMON |
Arthur Heymans | 74f9fe6 | 2019-04-24 12:29:44 +0200 | [diff] [blame] | 24 | select NO_FIXED_XIP_ROM_SIZE |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 25 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 26 | config SMM_TSEG_SIZE |
| 27 | hex |
| 28 | default 0x800000 |
| 29 | |
Aaron Durbin | 8ce667e | 2013-02-15 21:45:06 -0600 | [diff] [blame] | 30 | config IED_REGION_SIZE |
| 31 | hex |
| 32 | default 0x400000 |
| 33 | |
| 34 | config SMM_RESERVED_SIZE |
| 35 | hex |
| 36 | default 0x100000 |
| 37 | |
Aaron Durbin | b86113f | 2013-02-19 08:59:16 -0600 | [diff] [blame] | 38 | config RESET_ON_INVALID_RAMSTAGE_CACHE |
| 39 | bool "Reset the system on S3 wake when ramstage cache invalid." |
| 40 | default n |
Aaron Durbin | b86113f | 2013-02-19 08:59:16 -0600 | [diff] [blame] | 41 | help |
| 42 | The haswell romstage code caches the loaded ramstage program |
| 43 | in SMM space. On S3 wake the romstage will copy over a fresh |
| 44 | ramstage that was cached in the SMM space. This option determines |
| 45 | the action to take when the ramstage cache is invalid. If selected |
| 46 | the system will reset otherwise the ramstage will be reloaded from |
| 47 | cbfs. |
| 48 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 49 | endif |