| Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 1 | config BOOTBLOCK_CPU_INIT |
| 2 | string |
| 3 | default "cpu/ti/am335x/bootblock.c" |
| 4 | help |
| 5 | CPU/SoC-specific bootblock code. This is useful if the |
| 6 | bootblock must load microcode or copy data from ROM before |
| 7 | searching for the bootblock. |
| 8 | |
| Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 9 | config BOOTBLOCK_BASE |
| 10 | hex |
| Gabe Black | 3aa5816 | 2013-05-29 16:42:20 +0200 | [diff] [blame^] | 11 | default 0x402f0400 |
| Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 12 | |
| 13 | # Stack may reside in either IRAM or DRAM. We will define it to live |
| 14 | # at the top of IRAM for now. |
| 15 | # |
| 16 | # Stack grows downward, push operation stores register contents in |
| 17 | # consecutive memory locations ending just below SP |
| 18 | config STACK_TOP |
| 19 | hex |
| Gabe Black | 3aa5816 | 2013-05-29 16:42:20 +0200 | [diff] [blame^] | 20 | default 0x4030ce00 |
| Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 21 | |
| 22 | config STACK_BOTTOM |
| 23 | hex |
| Gabe Black | 3aa5816 | 2013-05-29 16:42:20 +0200 | [diff] [blame^] | 24 | default 0x4030be00 |
| Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 25 | |
| 26 | config STACK_SIZE |
| 27 | hex |
| 28 | default 0x1000 |
| 29 | |
| 30 | config CBFS_ROM_OFFSET |
| 31 | # Calculated by BL1 + max bootblock size. |
| 32 | hex "offset of CBFS data in ROM" |
| Gabe Black | 3aa5816 | 2013-05-29 16:42:20 +0200 | [diff] [blame^] | 33 | default 0x2800 |
| Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 34 | |
| 35 | ## TODO Change this to some better address not overlapping bootblock when |
| 36 | ## cbfstool supports creating header in arbitrary location. |
| 37 | config CBFS_HEADER_ROM_OFFSET |
| 38 | hex "offset of master CBFS header in ROM" |
| 39 | default 0x40 |
| 40 | |
| Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 41 | config SYS_SDRAM_BASE |
| 42 | hex |
| 43 | default 0x40000000 |
| 44 | |
| 45 | # FIXME: this can probably be smaller |
| 46 | config COREBOOT_TABLES_SIZE |
| 47 | hex |
| 48 | default 0x800 |