blob: 33b839bbca05167c78bdbb0fa3f37adae27fab30 [file] [log] [blame]
Brenton Dongdcc0aa82017-01-04 16:39:43 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2015-2016 Intel Corporation. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <soc/gpio.h>
17
18#if ENV_ROMSTAGE
19
20static const struct pad_config gpio_table[] = {
21 PAD_CFG_NF(GPIO_134, NATIVE, DEEP, NF2), /* ISH_I2C0_SDA/IO-OD */
22 PAD_CFG_NF(GPIO_135, NATIVE, DEEP, NF2), /* ISH_I2C0_SCL/IO-OD */
23 PAD_CFG_NF(GPIO_136, NATIVE, DEEP, NF2), /* ISH_I2C1_SDA/IO-OD */
24 PAD_CFG_NF(GPIO_137, NATIVE, DEEP, NF2), /* ISH_I2C1_SCL/IO-OD */
25
26 PAD_CFG_NF(GPIO_0, NATIVE, DEEP, NF1),
27 PAD_CFG_NF(GPIO_1, NATIVE, DEEP, NF1),
28 PAD_CFG_NF(GPIO_2, NATIVE, DEEP, NF1),
29 PAD_CFG_NF(GPIO_3, NATIVE, DEEP, NF1),
30 PAD_CFG_NF(GPIO_4, NATIVE, DEEP, NF1),
31 PAD_CFG_NF(GPIO_5, NATIVE, DEEP, NF1),
32 PAD_CFG_NF(GPIO_6, NATIVE, DEEP, NF1),
33 PAD_CFG_NF(GPIO_7, NATIVE, DEEP, NF1),
34 PAD_CFG_NF(GPIO_8, NATIVE, DEEP, NF1),
35
36 /* EXP_I2C_SDA and I2C_PSS_SDA and I2C_2_SDA_IOEXP */
37 PAD_CFG_NF(GPIO_7, NATIVE, DEEP, NF1),
38 /* EXP_I2C_SCL and I2C_PSS_SCL and I2C_2_SCL_IOEXP */
39 PAD_CFG_NF(GPIO_8, NATIVE, DEEP, NF1),
40
41 PAD_CFG_GPO(GPIO_152, 0, DEEP), /* PERST# */
42 PAD_CFG_GPO(GPIO_19, 1, DEEP), /* PFET */
43 PAD_CFG_GPO(GPIO_13, 0, DEEP), /* PERST# */
44 PAD_CFG_GPO(GPIO_17, 1, DEEP), /* PFET */
45 PAD_CFG_GPO(GPIO_15, 0, DEEP), /* PERST# */
46
47 PAD_CFG_NF(GPIO_210, NATIVE, DEEP, NF1), /* CLKREQ# */
48
49 PAD_CFG_NF(SMB_CLK, NATIVE, DEEP, NF1),
50 PAD_CFG_NF(SMB_DATA, NATIVE, DEEP, NF1),
51 PAD_CFG_NF(LPC_ILB_SERIRQ, NATIVE, DEEP, NF1),
52 PAD_CFG_NF(LPC_CLKOUT0, NATIVE, DEEP, NF1),
53 PAD_CFG_NF(LPC_CLKOUT1, NATIVE, DEEP, NF1),
54 PAD_CFG_NF(LPC_AD0, NATIVE, DEEP, NF1),
55 PAD_CFG_NF(LPC_AD1, NATIVE, DEEP, NF1),
56 PAD_CFG_NF(LPC_AD2, NATIVE, DEEP, NF1),
57 PAD_CFG_NF(LPC_AD3, NATIVE, DEEP, NF1),
58 PAD_CFG_NF(LPC_CLKRUNB, NATIVE, DEEP, NF1),
59 PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1),
60};
61
62#endif