Angel Pons | 6ad9176 | 2020-04-03 01:23:24 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Mario Scheithauer | 092db95 | 2017-01-31 15:45:13 +0100 | [diff] [blame] | 2 | |
Angel Pons | 45eeae4 | 2020-11-10 16:57:44 +0100 | [diff] [blame] | 3 | #include <bootstate.h> |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 4 | #include <console/console.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 5 | #include <device/mmio.h> |
Mario Scheithauer | 092db95 | 2017-01-31 15:45:13 +0100 | [diff] [blame] | 6 | #include <device/device.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 7 | #include <device/pci_ops.h> |
Mario Scheithauer | b83858a | 2017-09-05 15:32:49 +0200 | [diff] [blame] | 8 | #include <device/pci_ids.h> |
Mario Scheithauer | 480eab0 | 2017-02-16 13:39:16 +0100 | [diff] [blame] | 9 | #include <hwilib.h> |
| 10 | #include <i210.h> |
Mario Scheithauer | 0af272c | 2018-04-10 12:40:11 +0200 | [diff] [blame] | 11 | #include <intelblocks/cpulib.h> |
Werner Zeh | 2cb3cc5 | 2020-07-07 09:21:43 +0200 | [diff] [blame] | 12 | #include <intelblocks/fast_spi.h> |
Mario Scheithauer | 0af272c | 2018-04-10 12:40:11 +0200 | [diff] [blame] | 13 | #include <intelblocks/systemagent.h> |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 14 | #include <soc/pci_devs.h> |
Mario Scheithauer | 92e4ed1 | 2021-01-14 14:54:38 +0100 | [diff] [blame] | 15 | #include <soc/ramstage.h> |
Ravi Sarawadi | efa606b | 2017-08-04 16:26:09 -0700 | [diff] [blame] | 16 | #include <string.h> |
Werner Zeh | efd0eb3 | 2017-09-12 08:58:44 +0200 | [diff] [blame] | 17 | #include <timer.h> |
Angel Pons | 45eeae4 | 2020-11-10 16:57:44 +0100 | [diff] [blame] | 18 | #include <timestamp.h> |
Mario Scheithauer | d127be1 | 2018-04-23 10:55:39 +0200 | [diff] [blame] | 19 | #include <baseboard/variants.h> |
Elyes HAOUAS | e39db68 | 2019-05-15 21:12:31 +0200 | [diff] [blame] | 20 | #include <types.h> |
Mario Scheithauer | 480eab0 | 2017-02-16 13:39:16 +0100 | [diff] [blame] | 21 | |
| 22 | #define MAX_PATH_DEPTH 12 |
| 23 | #define MAX_NUM_MAPPINGS 10 |
| 24 | |
Mario Scheithauer | 0af272c | 2018-04-10 12:40:11 +0200 | [diff] [blame] | 25 | #define BIOS_MAILBOX_WAIT_MAX_MS 1000 |
| 26 | #define BIOS_MAILBOX_DATA 0x7080 |
| 27 | #define BIOS_MAILBOX_INTERFACE 0x7084 |
| 28 | #define RUN_BUSY_STS (1 << 31) |
| 29 | |
Mario Scheithauer | 7815c07 | 2019-07-17 09:40:33 +0200 | [diff] [blame] | 30 | #define SD_CAP_BYP 0x810 |
| 31 | #define SD_CAP_BYP_EN 0x5A |
| 32 | #define SD_CAP_BYP_REG1 0x814 |
| 33 | |
Mario Scheithauer | 480eab0 | 2017-02-16 13:39:16 +0100 | [diff] [blame] | 34 | /** \brief This function can decide if a given MAC address is valid or not. |
| 35 | * Currently, addresses filled with 0xff or 0x00 are not valid. |
| 36 | * @param mac Buffer to the MAC address to check |
| 37 | * @return 0 if address is not valid, otherwise 1 |
| 38 | */ |
Angel Pons | c19a9a5 | 2020-11-10 17:08:11 +0100 | [diff] [blame] | 39 | static uint8_t is_mac_adr_valid(uint8_t mac[MAC_ADDR_LEN]) |
Mario Scheithauer | 480eab0 | 2017-02-16 13:39:16 +0100 | [diff] [blame] | 40 | { |
Angel Pons | afb60e7 | 2020-11-10 17:10:01 +0100 | [diff] [blame] | 41 | for (size_t i = 0; i < MAC_ADDR_LEN; i++) { |
| 42 | if (mac[i] != 0x00 && mac[i] != 0xff) |
| 43 | return 1; |
| 44 | if (mac[i] != mac[0]) |
| 45 | return 1; |
| 46 | } |
| 47 | return 0; |
Mario Scheithauer | 480eab0 | 2017-02-16 13:39:16 +0100 | [diff] [blame] | 48 | } |
| 49 | |
| 50 | /** \brief This function will search for a MAC address which can be assigned |
| 51 | * to a MACPHY. |
| 52 | * @param dev pointer to PCI device |
| 53 | * @param mac buffer where to store the MAC address |
| 54 | * @return cb_err CB_ERR or CB_SUCCESS |
| 55 | */ |
Angel Pons | c19a9a5 | 2020-11-10 17:08:11 +0100 | [diff] [blame] | 56 | enum cb_err mainboard_get_mac_address(struct device *dev, uint8_t mac[MAC_ADDR_LEN]) |
Mario Scheithauer | 480eab0 | 2017-02-16 13:39:16 +0100 | [diff] [blame] | 57 | { |
| 58 | struct bus *parent = dev->bus; |
| 59 | uint8_t buf[16], mapping[16], i = 0, chain_len = 0; |
| 60 | |
| 61 | memset(buf, 0, sizeof(buf)); |
| 62 | memset(mapping, 0, sizeof(mapping)); |
| 63 | |
| 64 | /* The first entry in the tree is the device itself. */ |
| 65 | buf[0] = dev->path.pci.devfn; |
| 66 | chain_len = 1; |
| 67 | for (i = 1; i < MAX_PATH_DEPTH && parent->dev->bus->subordinate; i++) { |
| 68 | buf[i] = parent->dev->path.pci.devfn; |
| 69 | chain_len++; |
| 70 | parent = parent->dev->bus; |
| 71 | } |
| 72 | if (i == MAX_PATH_DEPTH) { |
| 73 | /* The path is deeper than MAX_PATH_DEPTH devices, error. */ |
| 74 | printk(BIOS_ERR, "Too many bridges for %s\n", dev_path(dev)); |
| 75 | return CB_ERR; |
| 76 | } |
| 77 | /* |
| 78 | * Now construct the mapping based on the device chain starting from |
| 79 | * root bridge device to the device itself. |
| 80 | */ |
| 81 | mapping[0] = 1; |
| 82 | mapping[1] = chain_len; |
| 83 | for (i = 0; i < chain_len; i++) |
| 84 | mapping[i + 4] = buf[chain_len - i - 1]; |
| 85 | |
| 86 | /* Open main hwinfo block */ |
| 87 | if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS) |
| 88 | return CB_ERR; |
Angel Pons | a9db4bd | 2020-11-10 18:17:10 +0100 | [diff] [blame] | 89 | /* Now try to find a valid MAC address in hwinfo for this mapping. */ |
Mario Scheithauer | 480eab0 | 2017-02-16 13:39:16 +0100 | [diff] [blame] | 90 | for (i = 0; i < MAX_NUM_MAPPINGS; i++) { |
Angel Pons | a9db4bd | 2020-11-10 18:17:10 +0100 | [diff] [blame] | 91 | if (hwilib_get_field(XMac1Mapping + i, buf, 16) != 16) |
Mario Scheithauer | 480eab0 | 2017-02-16 13:39:16 +0100 | [diff] [blame] | 92 | continue; |
Angel Pons | a9db4bd | 2020-11-10 18:17:10 +0100 | [diff] [blame] | 93 | if (memcmp(buf, mapping, chain_len + 4)) |
| 94 | continue; |
| 95 | /* There is a matching mapping available, get MAC address. */ |
Angel Pons | c19a9a5 | 2020-11-10 17:08:11 +0100 | [diff] [blame] | 96 | if (hwilib_get_field(XMac1 + i, mac, MAC_ADDR_LEN) == MAC_ADDR_LEN) { |
Angel Pons | a9db4bd | 2020-11-10 18:17:10 +0100 | [diff] [blame] | 97 | if (is_mac_adr_valid(mac)) |
| 98 | return CB_SUCCESS; |
| 99 | } |
| 100 | return CB_ERR; |
Mario Scheithauer | 480eab0 | 2017-02-16 13:39:16 +0100 | [diff] [blame] | 101 | } |
| 102 | /* No MAC address found for */ |
| 103 | return CB_ERR; |
| 104 | } |
Mario Scheithauer | 092db95 | 2017-01-31 15:45:13 +0100 | [diff] [blame] | 105 | |
Mario Scheithauer | 0af272c | 2018-04-10 12:40:11 +0200 | [diff] [blame] | 106 | /** \brief This function fixes an accuracy issue with IDT PMIC. |
| 107 | * The current reported system power consumption is higher than the |
| 108 | * actual consumption. With a correction of slope and offset for Vcc |
| 109 | * and Vnn, the issue is solved. |
| 110 | */ |
| 111 | static void config_pmic_imon(void) |
| 112 | { |
| 113 | struct stopwatch sw; |
| 114 | uint32_t power_max; |
| 115 | |
| 116 | printk(BIOS_DEBUG, "PMIC: Configure PMIC IMON - Start\n"); |
| 117 | |
| 118 | /* Calculate CPU TDP in mW */ |
| 119 | power_max = cpu_get_power_max(); |
| 120 | printk(BIOS_INFO, "PMIC: CPU TDP %d mW.\n", power_max); |
| 121 | |
| 122 | /* |
| 123 | * Fix Vnn slope and offset value. |
| 124 | * slope = 0x4a4 # 2.32 |
| 125 | * offset = 0xfa0d # -2.975 |
| 126 | */ |
| 127 | stopwatch_init_msecs_expire(&sw, BIOS_MAILBOX_WAIT_MAX_MS); |
| 128 | /* Read P_CR_BIOS_MAILBOX_INTERFACE_0_0_0_MCHBAR and check RUN_BUSY. */ |
| 129 | while ((MCHBAR32(BIOS_MAILBOX_INTERFACE) & RUN_BUSY_STS)) { |
| 130 | if (stopwatch_expired(&sw)) { |
| 131 | printk(BIOS_ERR, "PMIC: Power consumption measurement " |
| 132 | "setup fails for Vnn.\n"); |
| 133 | return; |
| 134 | } |
| 135 | } |
| 136 | /* Set Vnn values into P_CR_BIOS_MAILBOX_DATA_0_0_0_MCHBAR. */ |
| 137 | MCHBAR32(BIOS_MAILBOX_DATA) = 0xfa0d04a4; |
| 138 | /* Set command, address and busy bit. */ |
| 139 | MCHBAR32(BIOS_MAILBOX_INTERFACE) = 0x8000011d; |
| 140 | printk(BIOS_DEBUG, "PMIC: Fix Vnn slope and offset value.\n"); |
| 141 | |
| 142 | /* |
| 143 | * Fix Vcc slope and offset value. |
| 144 | * Premium and High SKU: |
| 145 | * slope = 0x466 # 2.2 |
| 146 | * offset = 0xe833 # -11.9 |
| 147 | * Low and Intermediate SKU: |
| 148 | * slope = 0x3b3 # 1.85 |
| 149 | * offset = 0xed33 # -9.4 |
| 150 | */ |
| 151 | stopwatch_init_msecs_expire(&sw, BIOS_MAILBOX_WAIT_MAX_MS); |
| 152 | while ((MCHBAR32(BIOS_MAILBOX_INTERFACE) & RUN_BUSY_STS)) { |
| 153 | if (stopwatch_expired(&sw)) { |
| 154 | printk(BIOS_ERR, "PMIC: Power consumption measurement " |
| 155 | "setup fails for Vcc.\n"); |
| 156 | return; |
| 157 | } |
| 158 | } |
| 159 | |
| 160 | /* |
| 161 | * CPU TDP limit between Premium/High and Low/Intermediate SKU |
| 162 | * is 9010 mW. |
| 163 | */ |
| 164 | if (power_max > 9010) { |
| 165 | MCHBAR32(BIOS_MAILBOX_DATA) = 0xe8330466; |
| 166 | MCHBAR32(BIOS_MAILBOX_INTERFACE) = 0x8000001d; |
| 167 | printk(BIOS_INFO, "PMIC: Fix Vcc for Premium SKU.\n"); |
| 168 | } else { |
| 169 | MCHBAR32(BIOS_MAILBOX_DATA) = 0xed3303b3; |
| 170 | MCHBAR32(BIOS_MAILBOX_INTERFACE) = 0x8000001d; |
| 171 | printk(BIOS_INFO, "PMIC: Fix Vcc for Low SKU.\n"); |
| 172 | } |
| 173 | |
| 174 | printk(BIOS_DEBUG, "PMIC: Configure PMIC IMON - End\n"); |
| 175 | } |
| 176 | |
Mario Scheithauer | 92e4ed1 | 2021-01-14 14:54:38 +0100 | [diff] [blame] | 177 | void mainboard_silicon_init_params(FSP_S_CONFIG *silconfig) |
| 178 | { |
| 179 | printk(BIOS_DEBUG, "MAINBOARD: %s/%s called\n", __FILE__, __func__); |
| 180 | |
| 181 | /* Disable CPU power states (C-states) */ |
| 182 | silconfig->EnableCx = 0; |
| 183 | |
| 184 | /* Set max Pkg Cstate to PkgC0C1 */ |
| 185 | silconfig->PkgCStateLimit = 0; |
| 186 | |
| 187 | /* Disable PCIe Transmitter Half Swing for all RPs */ |
| 188 | memset(silconfig->PcieRpTransmitterHalfSwing, 0, |
| 189 | sizeof(silconfig->PcieRpTransmitterHalfSwing)); |
| 190 | |
| 191 | /* Disable PCI Express Active State Power Management for all RPs */ |
| 192 | memset(silconfig->PcieRpAspm, 0, |
| 193 | sizeof(silconfig->PcieRpAspm)); |
| 194 | |
| 195 | /* Disable PCI Express L1 Substate for all RPs */ |
| 196 | memset(silconfig->PcieRpL1Substates, 0, |
| 197 | sizeof(silconfig->PcieRpL1Substates)); |
| 198 | } |
| 199 | |
Mario Scheithauer | 092db95 | 2017-01-31 15:45:13 +0100 | [diff] [blame] | 200 | static void mainboard_init(void *chip_info) |
| 201 | { |
Mario Scheithauer | 2d98120 | 2017-03-27 13:25:57 +0200 | [diff] [blame] | 202 | const struct pad_config *pads; |
| 203 | size_t num; |
| 204 | |
Mario Scheithauer | d127be1 | 2018-04-23 10:55:39 +0200 | [diff] [blame] | 205 | pads = variant_gpio_table(&num); |
Mario Scheithauer | 2d98120 | 2017-03-27 13:25:57 +0200 | [diff] [blame] | 206 | gpio_configure_pads(pads, num); |
Mario Scheithauer | 0af272c | 2018-04-10 12:40:11 +0200 | [diff] [blame] | 207 | |
| 208 | config_pmic_imon(); |
Mario Scheithauer | 092db95 | 2017-01-31 15:45:13 +0100 | [diff] [blame] | 209 | } |
| 210 | |
Mario Scheithauer | 956a9f6 | 2017-03-29 17:09:37 +0200 | [diff] [blame] | 211 | static void mainboard_final(void *chip_info) |
| 212 | { |
Elyes HAOUAS | 47503cd | 2018-05-04 21:58:51 +0200 | [diff] [blame] | 213 | struct device *dev = NULL; |
Mario Scheithauer | 956a9f6 | 2017-03-29 17:09:37 +0200 | [diff] [blame] | 214 | |
Mario Scheithauer | 6141353 | 2018-04-25 14:05:09 +0200 | [diff] [blame] | 215 | /* Do board specific things */ |
| 216 | variant_mainboard_final(); |
Mario Scheithauer | b83858a | 2017-09-05 15:32:49 +0200 | [diff] [blame] | 217 | |
Werner Zeh | 1412ffa | 2021-07-20 07:33:20 +0200 | [diff] [blame] | 218 | /* Set Master Enable for on-board PCI device if allowed. */ |
Werner Zeh | e8fc8f3 | 2021-07-22 06:44:01 +0200 | [diff] [blame] | 219 | if (CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE)) { |
Werner Zeh | 1412ffa | 2021-07-20 07:33:20 +0200 | [diff] [blame] | 220 | dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403f, 0); |
| 221 | if (dev) { |
| 222 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); |
| 223 | } |
Mario Scheithauer | b83858a | 2017-09-05 15:32:49 +0200 | [diff] [blame] | 224 | } |
Werner Zeh | d5de063 | 2018-09-19 11:06:22 +0200 | [diff] [blame] | 225 | /* Set up SPI OPCODE menu before the controller is locked. */ |
Werner Zeh | 2cb3cc5 | 2020-07-07 09:21:43 +0200 | [diff] [blame] | 226 | fast_spi_set_opcode_menu(); |
Mario Scheithauer | 7815c07 | 2019-07-17 09:40:33 +0200 | [diff] [blame] | 227 | |
| 228 | /* Set SD-Card speed to HS mode only. */ |
| 229 | dev = pcidev_path_on_root(PCH_DEVFN_SDCARD); |
| 230 | if (dev) { |
| 231 | uint32_t reg; |
| 232 | struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 233 | if (!res) |
| 234 | return; |
| 235 | |
| 236 | write32(res2mmio(res, SD_CAP_BYP, 0), SD_CAP_BYP_EN); |
| 237 | reg = read32(res2mmio(res, SD_CAP_BYP_REG1, 0)); |
| 238 | /* Disable all UHS-I SD-Card speed modes, keep only HS mode. */ |
| 239 | reg &= ~0x2000f800; |
| 240 | write32(res2mmio(res, SD_CAP_BYP_REG1, 0), reg); |
| 241 | } |
Mario Scheithauer | 956a9f6 | 2017-03-29 17:09:37 +0200 | [diff] [blame] | 242 | } |
| 243 | |
Mario Scheithauer | 6141353 | 2018-04-25 14:05:09 +0200 | [diff] [blame] | 244 | /* The following function performs board specific things. */ |
| 245 | void __weak variant_mainboard_final(void) |
Werner Zeh | efd0eb3 | 2017-09-12 08:58:44 +0200 | [diff] [blame] | 246 | { |
Werner Zeh | efd0eb3 | 2017-09-12 08:58:44 +0200 | [diff] [blame] | 247 | } |
| 248 | |
Mario Scheithauer | 092db95 | 2017-01-31 15:45:13 +0100 | [diff] [blame] | 249 | struct chip_operations mainboard_ops = { |
| 250 | .init = mainboard_init, |
Mario Scheithauer | 956a9f6 | 2017-03-29 17:09:37 +0200 | [diff] [blame] | 251 | .final = mainboard_final, |
Mario Scheithauer | 092db95 | 2017-01-31 15:45:13 +0100 | [diff] [blame] | 252 | }; |
Angel Pons | 45eeae4 | 2020-11-10 16:57:44 +0100 | [diff] [blame] | 253 | |
| 254 | static void wait_for_legacy_dev(void *unused) |
| 255 | { |
| 256 | uint32_t legacy_delay, us_since_boot; |
| 257 | struct stopwatch sw; |
| 258 | |
| 259 | if (CONFIG(BOARD_SIEMENS_MC_APL4)) |
| 260 | return; |
| 261 | |
| 262 | /* Open main hwinfo block. */ |
| 263 | if (hwilib_find_blocks("hwinfo.hex") != CB_SUCCESS) |
| 264 | return; |
| 265 | |
| 266 | /* Get legacy delay parameter from hwinfo. */ |
| 267 | if (hwilib_get_field(LegacyDelay, (uint8_t *) &legacy_delay, |
| 268 | sizeof(legacy_delay)) != sizeof(legacy_delay)) |
| 269 | return; |
| 270 | |
| 271 | us_since_boot = get_us_since_boot(); |
| 272 | /* No need to wait if the time since boot is already long enough.*/ |
| 273 | if (us_since_boot > legacy_delay) |
| 274 | return; |
| 275 | stopwatch_init_msecs_expire(&sw, (legacy_delay - us_since_boot) / 1000); |
| 276 | printk(BIOS_NOTICE, "Wait remaining %d of %d us for legacy devices...", |
| 277 | legacy_delay - us_since_boot, legacy_delay); |
| 278 | stopwatch_wait_until_expired(&sw); |
| 279 | printk(BIOS_NOTICE, "done!\n"); |
| 280 | } |
| 281 | |
| 282 | BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, wait_for_legacy_dev, NULL); |