Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 1 | |
| 2 | config CPU_INTEL_HASWELL |
| 3 | bool |
| 4 | |
| 5 | if CPU_INTEL_HASWELL |
| 6 | |
| 7 | config CPU_SPECIFIC_OPTIONS |
| 8 | def_bool y |
Furquan Shaikh | 99ac98f | 2014-04-23 10:18:48 -0700 | [diff] [blame] | 9 | select ARCH_BOOTBLOCK_X86_32 |
Stefan Reinauer | 77b1655 | 2015-01-14 19:51:47 +0100 | [diff] [blame] | 10 | select ARCH_VERSTAGE_X86_32 |
Furquan Shaikh | 99ac98f | 2014-04-23 10:18:48 -0700 | [diff] [blame] | 11 | select ARCH_ROMSTAGE_X86_32 |
| 12 | select ARCH_RAMSTAGE_X86_32 |
Aaron Durbin | 6a36004 | 2014-02-13 10:30:42 -0600 | [diff] [blame] | 13 | select BACKUP_DEFAULT_SMM_REGION |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 14 | select SMP |
| 15 | select SSE2 |
Aaron Durbin | 7cb1ba9 | 2013-05-01 15:39:28 -0500 | [diff] [blame] | 16 | select UDELAY_TSC |
| 17 | select TSC_CONSTANT_RATE |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 18 | select SMM_TSEG |
Aaron Durbin | 29ffa54 | 2012-12-21 21:21:48 -0600 | [diff] [blame] | 19 | select SMM_MODULES |
Aaron Durbin | 305b1f0 | 2013-01-15 08:27:05 -0600 | [diff] [blame] | 20 | select RELOCATABLE_MODULES |
Kyösti Mälkki | d05d0db | 2014-10-16 14:54:03 +0300 | [diff] [blame] | 21 | select RELOCATABLE_RAMSTAGE |
Alexandru Gagniuc | 66e0c4c | 2013-12-04 22:21:15 -0600 | [diff] [blame] | 22 | select SUPPORT_CPU_UCODE_IN_CBFS |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 23 | #select AP_IN_SIPI_WAIT |
| 24 | select TSC_SYNC_MFENCE |
Aaron Durbin | 6dccedd | 2012-12-03 16:17:40 -0600 | [diff] [blame] | 25 | select CPU_INTEL_FIRMWARE_INTERFACE_TABLE |
Kyösti Mälkki | 5c3f384 | 2014-05-08 15:27:15 +0300 | [diff] [blame] | 26 | select PARALLEL_CPU_INIT |
Aaron Durbin | 014baea | 2014-03-28 22:01:05 -0500 | [diff] [blame] | 27 | select PARALLEL_MP |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 28 | |
| 29 | config BOOTBLOCK_CPU_INIT |
| 30 | string |
| 31 | default "cpu/intel/haswell/bootblock.c" |
| 32 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 33 | config SMM_TSEG_SIZE |
| 34 | hex |
| 35 | default 0x800000 |
| 36 | |
Matt DeVillier | b2a14fb | 2014-07-07 18:48:16 -0500 | [diff] [blame] | 37 | config ENABLE_VMX |
| 38 | bool "Enable VMX for virtualization" |
| 39 | default n |
| 40 | |
Aaron Durbin | 8ce667e | 2013-02-15 21:45:06 -0600 | [diff] [blame] | 41 | config IED_REGION_SIZE |
| 42 | hex |
| 43 | default 0x400000 |
| 44 | |
| 45 | config SMM_RESERVED_SIZE |
| 46 | hex |
| 47 | default 0x100000 |
| 48 | |
Aaron Durbin | b86113f | 2013-02-19 08:59:16 -0600 | [diff] [blame] | 49 | config RESET_ON_INVALID_RAMSTAGE_CACHE |
| 50 | bool "Reset the system on S3 wake when ramstage cache invalid." |
| 51 | default n |
| 52 | depends on RELOCATABLE_RAMSTAGE |
| 53 | help |
| 54 | The haswell romstage code caches the loaded ramstage program |
| 55 | in SMM space. On S3 wake the romstage will copy over a fresh |
| 56 | ramstage that was cached in the SMM space. This option determines |
| 57 | the action to take when the ramstage cache is invalid. If selected |
| 58 | the system will reset otherwise the ramstage will be reloaded from |
| 59 | cbfs. |
| 60 | |
Aaron Durbin | c46cc6f | 2013-04-29 16:57:10 -0500 | [diff] [blame] | 61 | config MONOTONIC_TIMER_MSR |
| 62 | def_bool n |
| 63 | depends on INTEL_LYNXPOINT_LP |
| 64 | select HAVE_MONOTONIC_TIMER |
| 65 | help |
Paul Menzel | 4e01cfb | 2013-05-13 23:06:34 +0200 | [diff] [blame] | 66 | Provide a monotonic timer using the 24MHz MSR counter. |
Aaron Durbin | c46cc6f | 2013-04-29 16:57:10 -0500 | [diff] [blame] | 67 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 68 | endif |