Piotr Król | dcd2f17 | 2016-05-27 12:04:13 +0200 | [diff] [blame] | 1 | # |
| 2 | # This file is part of the coreboot project. |
| 3 | # |
| 4 | # Copyright (C) 2013 Advanced Micro Devices, Inc. |
| 5 | # |
| 6 | # This program is free software; you can redistribute it and/or modify |
| 7 | # it under the terms of the GNU General Public License as published by |
| 8 | # the Free Software Foundation; version 2 of the License. |
| 9 | # |
| 10 | # This program is distributed in the hope that it will be useful, |
| 11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | # GNU General Public License for more details. |
| 14 | # |
| 15 | chip northbridge/amd/pi/00730F01/root_complex |
| 16 | device cpu_cluster 0 on |
| 17 | chip cpu/amd/pi/00730F01 |
| 18 | device lapic 0 on end |
| 19 | end |
| 20 | end |
| 21 | |
| 22 | device domain 0 on |
| 23 | subsystemid 0x1022 0x1410 inherit |
Piotr Król | dcd2f17 | 2016-05-27 12:04:13 +0200 | [diff] [blame] | 24 | |
Kyösti Mälkki | 4dba497 | 2019-02-07 13:25:51 +0200 | [diff] [blame] | 25 | chip northbridge/amd/pi/00730F01 |
| 26 | device pci 0.0 on end # Root Complex |
| 27 | device pci 0.2 on end # IOMMU |
| 28 | device pci 1.0 off end # Internal Graphics P2P bridge 0x9804 |
| 29 | device pci 1.1 off end # Internal Multimedia |
| 30 | device pci 2.0 on end # PCIe Host Bridge |
| 31 | device pci 2.1 on end # mPCIe slot 2 (on GFX lane) |
| 32 | device pci 2.2 on end # LAN3 |
| 33 | device pci 2.3 on end # LAN2 |
| 34 | device pci 2.4 on end # LAN1 |
| 35 | device pci 2.5 on end # mPCIe slot 1 |
| 36 | device pci 8.0 on end # Platform Security Processor |
| 37 | end #chip northbridge/amd/pi/00730F01 |
Piotr Król | dcd2f17 | 2016-05-27 12:04:13 +0200 | [diff] [blame] | 38 | |
Kyösti Mälkki | 4dba497 | 2019-02-07 13:25:51 +0200 | [diff] [blame] | 39 | chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus |
| 40 | device pci 10.0 on end # XHCI HC0 muxed with EHCI 2 |
| 41 | device pci 11.0 on end # SATA |
| 42 | device pci 12.0 on end # USB EHCI0 usb[0:3] is connected |
| 43 | device pci 13.0 on end # USB EHCI1 usb[4:7] |
| 44 | device pci 14.0 on end # SM |
| 45 | device pci 14.3 on # LPC 0x439d |
| 46 | chip superio/nuvoton/nct5104d # SIO NCT5104D |
| 47 | register "irq_trigger_type" = "0" |
| 48 | device pnp 2e.0 off end |
| 49 | device pnp 2e.2 on |
| 50 | io 0x60 = 0x3f8 |
| 51 | irq 0x70 = 4 |
| 52 | end |
| 53 | device pnp 2e.3 on |
| 54 | io 0x60 = 0x2f8 |
| 55 | irq 0x70 = 3 |
| 56 | end |
| 57 | device pnp 2e.10 on |
| 58 | # UART C is conditionally turned on |
| 59 | io 0x60 = 0x3e8 |
| 60 | irq 0x70 = 4 |
| 61 | end |
| 62 | device pnp 2e.11 on |
| 63 | # UART D is conditionally turned on |
| 64 | io 0x60 = 0x2e8 |
| 65 | irq 0x70 = 3 |
| 66 | end |
| 67 | device pnp 2e.8 off end |
Kyösti Mälkki | 4dba497 | 2019-02-07 13:25:51 +0200 | [diff] [blame] | 68 | # GPIO0 and GPIO1 are conditionally turned on |
| 69 | device pnp 2e.007 on end |
| 70 | device pnp 2e.107 on end |
| 71 | device pnp 2e.607 off end |
| 72 | device pnp 2e.e off end |
Piotr Kleinschmidt | 941c9ac | 2020-01-08 15:06:26 +0100 | [diff] [blame] | 73 | device pnp 2e.f on end |
Kyösti Mälkki | 4dba497 | 2019-02-07 13:25:51 +0200 | [diff] [blame] | 74 | end # SIO NCT5104D |
| 75 | end # LPC 0x439d |
Piotr Król | dcd2f17 | 2016-05-27 12:04:13 +0200 | [diff] [blame] | 76 | |
Kyösti Mälkki | 4dba497 | 2019-02-07 13:25:51 +0200 | [diff] [blame] | 77 | device pci 14.7 on end # SD |
| 78 | device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI |
| 79 | end #chip southbridge/amd/pi/hudson |
Piotr Król | dcd2f17 | 2016-05-27 12:04:13 +0200 | [diff] [blame] | 80 | |
Kyösti Mälkki | 4dba497 | 2019-02-07 13:25:51 +0200 | [diff] [blame] | 81 | device pci 18.0 on end |
| 82 | device pci 18.1 on end |
| 83 | device pci 18.2 on end |
| 84 | device pci 18.3 on end |
| 85 | device pci 18.4 on end |
| 86 | device pci 18.5 on end |
Piotr Król | dcd2f17 | 2016-05-27 12:04:13 +0200 | [diff] [blame] | 87 | |
Piotr Król | dcd2f17 | 2016-05-27 12:04:13 +0200 | [diff] [blame] | 88 | end #domain |
| 89 | end #northbridge/amd/pi/00730F01/root_complex |