| Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <console/console.h> |
| 17 | #include <arch/io.h> |
| 18 | #include <device/device.h> |
| 19 | #include <device/pci.h> |
| 20 | #include <device/pci_ids.h> |
| 21 | |
| 22 | /* This is the AGP 3.0 "bridge" @ Bus 0 Device 1 Func 0 */ |
| 23 | |
| 24 | static void agp_bridge_init(device_t dev) |
| 25 | { |
| 26 | |
| 27 | device_t north_dev; |
| 28 | u8 reg8; |
| 29 | north_dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3324, 0); |
| 30 | |
| 31 | pci_write_config8(north_dev, 0xa0, 0x1); // Enable CPU Direct Access Frame Buffer |
| 32 | |
| 33 | pci_write_config8(north_dev, 0xa2, 0x4a); |
| 34 | |
| 35 | reg8 = pci_read_config8(north_dev, 0xc0); |
| 36 | reg8 |= 0x1; |
| 37 | pci_write_config8(north_dev, 0xc0, reg8); |
| 38 | |
| 39 | /* |
| 40 | * Since Internal Graphic already set to AGP3.0 compatible in its Capability Pointer |
| 41 | * We must set RAGP8X=1 B0D0F0 Rx84[3]=1 from backdoor register B0D0F0 RxB5[1:0]=11b |
| 42 | */ |
| 43 | north_dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x0324, 0); |
| 44 | reg8 = pci_read_config8(north_dev, 0xb5); |
| 45 | reg8 |= 0x3; |
| 46 | pci_write_config8(north_dev, 0xb5, reg8); |
| 47 | pci_write_config8(north_dev, 0x94, 0x20); |
| 48 | pci_write_config8(north_dev, 0x13, 0xd0); |
| 49 | |
| 50 | pci_write_config16(dev, 0x4, 0x0007); |
| 51 | |
| 52 | pci_write_config8(dev, 0x19, 0x01); |
| 53 | pci_write_config8(dev, 0x1a, 0x01); |
| 54 | pci_write_config8(dev, 0x1c, 0xe0); |
| 55 | pci_write_config8(dev, 0x1d, 0xe0); |
| 56 | pci_write_config16(dev, 0x1e, 0xa220); |
| 57 | |
| 58 | pci_write_config16(dev, 0x20, 0xdd00); |
| 59 | pci_write_config16(dev, 0x22, 0xdef0); |
| 60 | pci_write_config16(dev, 0x24, 0xa000); |
| 61 | pci_write_config16(dev, 0x26, 0xbff0); |
| 62 | |
| 63 | pci_write_config8(dev, 0x3e, 0x0c); |
| 64 | pci_write_config8(dev, 0x40, 0x8b); |
| 65 | pci_write_config8(dev, 0x41, 0x43); |
| 66 | pci_write_config8(dev, 0x42, 0x62); |
| 67 | pci_write_config8(dev, 0x43, 0x44); |
| 68 | pci_write_config8(dev, 0x44, 0x34); |
| 69 | } |
| 70 | |
| Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 71 | static struct device_operations agp_bridge_operations = { |
| Edward O'Callaghan | d204073 | 2014-10-31 08:26:21 +1100 | [diff] [blame] | 72 | .read_resources = DEVICE_NOOP, |
| Stefan Reinauer | aeba92a | 2009-04-17 08:37:18 +0000 | [diff] [blame] | 73 | .set_resources = pci_dev_set_resources, |
| 74 | .enable_resources = pci_bus_enable_resources, |
| 75 | .init = agp_bridge_init, |
| 76 | .scan_bus = pci_scan_bridge, |
| 77 | }; |
| 78 | |
| 79 | static const struct pci_driver agp_bridge_driver __pci_driver = { |
| 80 | .ops = &agp_bridge_operations, |
| 81 | .vendor = PCI_VENDOR_ID_VIA, |
| 82 | .device = 0xb198, |
| 83 | }; |