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efdesign98b0969d62011-06-16 16:35:54 -07001/* $NoKeywords:$ */
2/**
3 * @file
4 *
5 * AMD AGESA CPU C6 feature support code.
6 *
7 * Contains code that declares the AGESA CPU C6 related APIs
8 *
9 * @xrefitem bom "File Content Label" "Release Content"
10 * @e project: AGESA
11 * @e sub-project: CPU/Feature
12 * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
13 *
14 */
15/*
16 ******************************************************************************
17 *
18 * Copyright (c) 2011, Advanced Micro Devices, Inc.
19 * All rights reserved.
Edward O'Callaghanf1323162014-07-06 19:23:33 +100020 *
efdesign98b0969d62011-06-16 16:35:54 -070021 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
Edward O'Callaghanf1323162014-07-06 19:23:33 +100028 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
efdesign98b0969d62011-06-16 16:35:54 -070030 * from this software without specific prior written permission.
Edward O'Callaghanf1323162014-07-06 19:23:33 +100031 *
efdesign98b0969d62011-06-16 16:35:54 -070032 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 ******************************************************************************
43 */
44
45/*----------------------------------------------------------------------------------------
46 * M O D U L E S U S E D
47 *----------------------------------------------------------------------------------------
48 */
49#include "AGESA.h"
50#include "amdlib.h"
51#include "Ids.h"
52#include "cpuRegisters.h"
53#include "cpuEarlyInit.h"
54#include "GeneralServices.h"
55#include "cpuFamilyTranslation.h"
56#include "OptionMultiSocket.h"
57#include "cpuApicUtilities.h"
58#include "cpuServices.h"
59#include "cpuFeatures.h"
60#include "cpuC6State.h"
61#include "Filecode.h"
62CODE_GROUP (G1_PEICC)
63RDATA_GROUP (G1_PEICC)
64
65#define FILECODE PROC_CPU_FEATURE_CPUC6STATE_FILECODE
66
67/*----------------------------------------------------------------------------------------
68 * D E F I N I T I O N S A N D M A C R O S
69 *----------------------------------------------------------------------------------------
70 */
71
72/*----------------------------------------------------------------------------------------
73 * T Y P E D E F S A N D S T R U C T U R E S
74 *----------------------------------------------------------------------------------------
75 */
76
77/*----------------------------------------------------------------------------------------
78 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
79 *----------------------------------------------------------------------------------------
80 */
81VOID
82STATIC
83EnableC6OnSocket (
84 IN VOID *EntryPoint,
85 IN AMD_CONFIG_PARAMS *StdHeader,
86 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParams
87 );
88
89/*----------------------------------------------------------------------------------------
90 * E X P O R T E D F U N C T I O N S
91 *----------------------------------------------------------------------------------------
92 */
93extern CPU_FAMILY_SUPPORT_TABLE C6FamilyServiceTable;
94extern OPTION_MULTISOCKET_CONFIGURATION OptionMultiSocketConfiguration;
95
96/*---------------------------------------------------------------------------------------*/
97/**
98 * Should C6 be enabled
99 *
100 * @param[in] PlatformConfig Contains the runtime modifiable feature input data.
101 * @param[in] StdHeader Config Handle for library, services.
102 *
103 * @retval TRUE C6 is supported.
104 * @retval FALSE C6 cannot be enabled.
105 *
106 */
107BOOLEAN
108STATIC
109IsC6FeatureEnabled (
110 IN PLATFORM_CONFIGURATION *PlatformConfig,
111 IN AMD_CONFIG_PARAMS *StdHeader
112 )
113{
114 UINT32 Socket;
115 BOOLEAN IsEnabled;
116 C6_FAMILY_SERVICES *FamilyServices;
117
118 IsEnabled = FALSE;
119 if (PlatformConfig->CStateMode == CStateModeC6) {
120 IsEnabled = TRUE;
121 for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
122 if (IsProcessorPresent (Socket, StdHeader)) {
123 GetFeatureServicesOfSocket (&C6FamilyServiceTable, Socket, (const VOID **)&FamilyServices, StdHeader);
124 if ((FamilyServices == NULL) || !FamilyServices->IsC6Supported (FamilyServices, Socket, PlatformConfig, StdHeader)) {
125 IsEnabled = FALSE;
126 break;
127 }
128 }
129 }
130 }
131 return IsEnabled;
132}
133
134/*---------------------------------------------------------------------------------------*/
135/**
136 * Enable the C6 C-state
137 *
138 * @param[in] EntryPoint Timepoint designator.
139 * @param[in] PlatformConfig Contains the runtime modifiable feature input data.
140 * @param[in] StdHeader Config Handle for library, services.
141 *
142 * @retval AGESA_SUCCESS Always succeeds.
143 *
144 */
145AGESA_STATUS
146STATIC
147InitializeC6Feature (
148 IN UINT64 EntryPoint,
149 IN PLATFORM_CONFIGURATION *PlatformConfig,
150 IN AMD_CONFIG_PARAMS *StdHeader
151 )
152{
153 UINT32 BscSocket;
154 UINT32 Ignored;
155 UINT32 BscCoreNum;
156 UINT32 Core;
157 UINT32 Socket;
158 UINT32 NumberOfSockets;
159 UINT32 NumberOfCores;
160 AP_TASK TaskPtr;
161 AMD_CPU_EARLY_PARAMS CpuEarlyParams;
162 C6_FAMILY_SERVICES *C6FamilyServices;
163 AGESA_STATUS IgnoredSts;
164
165 CpuEarlyParams.PlatformConfig = *PlatformConfig;
166
167 TaskPtr.FuncAddress.PfApTaskIC = EnableC6OnSocket;
168 TaskPtr.DataTransfer.DataSizeInDwords = 2;
169 TaskPtr.DataTransfer.DataPtr = &EntryPoint;
170 TaskPtr.DataTransfer.DataTransferFlags = 0;
171 TaskPtr.ExeFlags = PASS_EARLY_PARAMS;
172 OptionMultiSocketConfiguration.BscRunCodeOnAllSystemCore0s (&TaskPtr, StdHeader, &CpuEarlyParams);
173
174 if ((EntryPoint & (CPU_FEAT_AFTER_POST_MTRR_SYNC | CPU_FEAT_AFTER_RESUME_MTRR_SYNC)) != 0) {
175 // Load any required microcode patches on both normal boot and resume from S3.
176 IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCoreNum, &IgnoredSts);
177 GetFeatureServicesOfSocket (&C6FamilyServiceTable, BscSocket, (const VOID **)&C6FamilyServices, StdHeader);
178 if (C6FamilyServices != NULL) {
179 C6FamilyServices->ReloadMicrocodePatchAfterMemInit (StdHeader);
180 }
181
182 // run code on all APs
183 TaskPtr.DataTransfer.DataSizeInDwords = 0;
184 TaskPtr.ExeFlags = 0;
185
186 NumberOfSockets = GetPlatformNumberOfSockets ();
187
188 for (Socket = 0; Socket < NumberOfSockets; Socket++) {
189 if (IsProcessorPresent (Socket, StdHeader)) {
190 GetFeatureServicesOfSocket (&C6FamilyServiceTable, Socket, (const VOID **)&C6FamilyServices, StdHeader);
191 if (C6FamilyServices != NULL) {
192 // run code on all APs
193 TaskPtr.FuncAddress.PfApTask = C6FamilyServices->ReloadMicrocodePatchAfterMemInit;
194 if (GetActiveCoresInGivenSocket (Socket, &NumberOfCores, StdHeader)) {
195 for (Core = 0; Core < NumberOfCores; Core++) {
196 if ((Socket != BscSocket) || (Core != BscCoreNum)) {
197 ApUtilRunCodeOnSocketCore ((UINT8) Socket, (UINT8) Core, &TaskPtr, StdHeader);
198 }
199 }
200 }
201 }
202 }
203 }
204 }
205 return AGESA_SUCCESS;
206}
207
208
209/*---------------------------------------------------------------------------------------*/
210/**
211 * 'Local' core 0 task to enable C6 on it's socket.
212 *
213 * @param[in] EntryPoint Timepoint designator.
214 * @param[in] StdHeader Config Handle for library, services.
215 * @param[in] CpuEarlyParams Service parameters.
216 *
217 */
218VOID
219STATIC
220EnableC6OnSocket (
221 IN VOID *EntryPoint,
222 IN AMD_CONFIG_PARAMS *StdHeader,
223 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParams
224 )
225{
226
227 C6_FAMILY_SERVICES *FamilyServices;
228
229 IDS_HDT_CONSOLE (CPU_TRACE, " C6 is enabled\n");
230
231 GetFeatureServicesOfCurrentCore (&C6FamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
232 FamilyServices->InitializeC6 (FamilyServices,
233 *((UINT64 *) EntryPoint),
234 &CpuEarlyParams->PlatformConfig,
235 StdHeader);
236}
237
238/*---------------------------------------------------------------------------------------*/
239/**
240 * Reload microcode patch after memory is initialized.
241 *
242 * @param[in] StdHeader Config Handle for library, services.
243 *
244 */
245VOID
246ReloadMicrocodePatchAfterMemInit (
247 IN AMD_CONFIG_PARAMS *StdHeader
248 )
249{
250 LoadMicrocodePatch (StdHeader);
251}
252
253
254CONST CPU_FEATURE_DESCRIPTOR ROMDATA CpuFeatureC6State =
255{
256 C6Cstate,
257 (CPU_FEAT_AFTER_PM_INIT | CPU_FEAT_AFTER_POST_MTRR_SYNC | CPU_FEAT_AFTER_RESUME_MTRR_SYNC),
258 IsC6FeatureEnabled,
259 InitializeC6Feature
260};