blob: 782face3b64211eed0a235c79caf068273a2f5b5 [file] [log] [blame]
Stefan Reinauer23f70342010-05-16 13:07:59 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * (C) Copyright 2008 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
18 * MA 02110-1301 USA
19 */
20
21#include <arch/io.h>
22#include <device/device.h>
23#include <device/pci.h>
24#include <device/pci_ops.h>
25#include <device/pci_ids.h>
26#include <console/console.h>
27#include <device/cardbus.h>
28#include "chip.h"
29
30static void pcixx12_init(device_t dev)
31{
32 /* cardbus controller function 1 for CF Socket */
33 printk(BIOS_DEBUG, "TI PCIxx12 init\n");
34}
35
36static void pcixx12_read_resources(device_t dev)
37{
38 cardbus_read_resources(dev);
39}
40
41static void pcixx12_set_resources(device_t dev)
42{
43 printk(BIOS_DEBUG, "%s In set resources \n",dev_path(dev));
44
45 pci_dev_set_resources(dev);
46
47 printk(BIOS_DEBUG, "%s done set resources \n",dev_path(dev));
48}
49
50static struct device_operations ti_pcixx12_ops = {
51 .read_resources = pcixx12_read_resources,
52 .set_resources = pcixx12_set_resources,
53 .enable_resources = cardbus_enable_resources,
54 .init = pcixx12_init,
55 .scan_bus = cardbus_scan_bridge,
56};
57
58static const struct pci_driver ti_pcixx12_driver __pci_driver = {
59 .ops = &ti_pcixx12_ops,
60 .vendor = 0x104c,
61 .device = 0x8039,
62};
63
64static void southbridge_init(device_t dev)
65{
66 // struct southbridge_ti_pcixx12_config *config = dev->chip_info;
67}
68
69struct chip_operations southbridge_ti_pcixx12_ops = {
70 CHIP_NAME("Texas Instruments PCIxx12 Cardbus Controller")
71 .enable_dev = southbridge_init,
72};