blob: 8134f1a36e8c8209bfcbd571e44545cb871d1f8d [file] [log] [blame]
Furquan Shaikhcbed0c22017-04-14 22:11:13 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2017 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <baseboard/variants.h>
17#include <gpio.h>
18#include <variant/gpio.h>
19
20/* DQ byte map */
21static const u8 dq_map[][12] = {
22 { 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0,
23 0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 },
24 { 0xCC, 0x33, 0x00, 0x33, 0xCC, 0x33,
25 0xCC, 0x00, 0xFF, 0x00, 0xFF, 0x00 }
26};
27
28/* DQS CPU<>DRAM map */
29static const u8 dqs_map[][8] = {
30 { 2, 3, 1, 0, 4, 7, 6, 5 },
31 { 5, 6, 0, 3, 4, 7, 2, 1 },
32};
33
34/* Rcomp resistor */
35static const u16 rcomp_resistor[] = { 200, 81, 162 };
36
37/* Rcomp target */
38static const u16 rcomp_target[] = { 100, 40, 40, 23, 40 };
39
40void __attribute__((weak)) variant_memory_params(struct memory_params *p)
41{
Furquan Shaikh48be29e2017-12-05 14:48:44 -080042 p->type = MEMORY_LPDDR3;
Furquan Shaikhcbed0c22017-04-14 22:11:13 -070043 p->dq_map = dq_map;
44 p->dq_map_size = sizeof(dq_map);
45 p->dqs_map = dqs_map;
46 p->dqs_map_size = sizeof(dqs_map);
47 p->rcomp_resistor = rcomp_resistor;
48 p->rcomp_resistor_size = sizeof(rcomp_resistor);
49 p->rcomp_target = rcomp_target;
50 p->rcomp_target_size = sizeof(rcomp_target);
51}
52
53int __attribute__((weak)) variant_memory_sku(void)
54{
55 gpio_t spd_gpios[] = {
56 GPIO_MEM_CONFIG_0,
57 GPIO_MEM_CONFIG_1,
58 GPIO_MEM_CONFIG_2,
59 GPIO_MEM_CONFIG_3,
60 };
61
62 return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
63}