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Furquan Shaikh06cd9032016-12-14 12:10:21 -08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2016 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
13 * GNU General Public License for more details.
14 */
15
Furquan Shaikh76c392d2017-04-13 14:15:56 -070016#ifndef __BASEBOARD_GPIO_H__
17#define __BASEBOARD_GPIO_H__
Furquan Shaikh06cd9032016-12-14 12:10:21 -080018
19#include <soc/gpe.h>
20#include <soc/gpio.h>
21
22/* EC in RW */
23#define GPIO_EC_IN_RW GPP_C6
24
25/* BIOS Flash Write Protect */
26#define GPIO_PCH_WP GPP_C23
27
28/* Memory configuration board straps */
29#define GPIO_MEM_CONFIG_0 GPP_C12
30#define GPIO_MEM_CONFIG_1 GPP_C13
31#define GPIO_MEM_CONFIG_2 GPP_C14
32#define GPIO_MEM_CONFIG_3 GPP_C15
33
34/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
35#define GPE_EC_WAKE GPE0_LAN_WAK
36
37/* eSPI virtual wire reporting */
38#define EC_SCI_GPI GPE0_ESPI
39
Furquan Shaikh3178bdc2017-05-27 17:52:32 -070040/* Power rail control signals */
41#define EN_PP3300_DX_CAM GPP_C11
42#define EN_CAM_PMIC_RST_L GPP_C10
43
Furquan Shaikh76c392d2017-04-13 14:15:56 -070044#endif /* BASEBOARD_GPIO_H */