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Gabe Blackd3163ab2013-05-16 05:53:40 -07001/*
2 * This file is part of the coreboot project.
3 *
David Hendricks1e3e2c52013-06-14 16:08:05 -07004 * Copyright 2013 Google Inc.
Gabe Blackd3163ab2013-05-16 05:53:40 -07005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Gabe Blackd3163ab2013-05-16 05:53:40 -070014 */
15
Julius Werner80af4422014-10-20 13:18:56 -070016#include <arch/cache.h>
17#include <arch/exception.h>
18#include <arch/stages.h>
Gabe Blackd3163ab2013-05-16 05:53:40 -070019#include <armv7.h>
Aaron Durbin899d13d2015-05-15 23:39:23 -050020#include <boot_device.h>
Gabe Blackd3163ab2013-05-16 05:53:40 -070021#include <cbfs.h>
Stefan Reinauer80e62932013-07-29 15:52:23 -070022#include <cbmem.h>
Aaron Durbindc9f5cd2015-09-08 13:34:43 -050023#include <commonlib/region.h>
Gabe Blackd3163ab2013-05-16 05:53:40 -070024#include <console/console.h>
Nico Huber0f2dd1e2017-08-01 14:02:40 +020025#include <device/i2c_simple.h>
Julius Werner80af4422014-10-20 13:18:56 -070026#include <drivers/maxim/max77802/max77802.h>
27#include <program_loading.h>
28#include <soc/clk.h>
29#include <soc/cpu.h>
30#include <soc/dmc.h>
31#include <soc/gpio.h>
32#include <soc/i2c.h>
33#include <soc/periph.h>
34#include <soc/power.h>
35#include <soc/setup.h>
36#include <soc/trustzone.h>
37#include <soc/wakeup.h>
38#include <stdlib.h>
39#include <timestamp.h>
40#include <types.h>
Gabe Blackd3163ab2013-05-16 05:53:40 -070041
David Hendricks77acf422013-08-05 21:04:16 -070042#define PMIC_I2C_BUS 4
43
David Hendricks1e3e2c52013-06-14 16:08:05 -070044struct pmic_write
45{
46 int or_orig; // Whether to or in the original value.
47 uint8_t reg; // Register to write.
48 uint8_t val; // Value to write.
49};
50
51/*
52 * Use read-modify-write for MAX77802 control registers and clobber the
53 * output voltage setting (BUCK?DVS?) registers.
54 */
55struct pmic_write pmic_writes[] =
56{
57 { 1, MAX77802_REG_PMIC_32KHZ, MAX77802_32KHCP_EN },
58 { 0, MAX77802_REG_PMIC_BUCK1DVS1, MAX77802_BUCK1DVS1_1V },
59 { 1, MAX77802_REG_PMIC_BUCK1CTRL, MAX77802_BUCK_TYPE1_ON |
60 MAX77802_BUCK_TYPE1_IGNORE_PWRREQ },
David Hendricks1f9f04e2013-08-01 18:57:52 -070061 { 0, MAX77802_REG_PMIC_BUCK2DVS1, MAX77802_BUCK2DVS1_1_2625V },
David Hendricks1e3e2c52013-06-14 16:08:05 -070062 { 1, MAX77802_REG_PMIC_BUCK2CTRL1, MAX77802_BUCK_TYPE2_ON |
63 MAX77802_BUCK_TYPE2_IGNORE_PWRREQ },
64 { 0, MAX77802_REG_PMIC_BUCK3DVS1, MAX77802_BUCK3DVS1_1V },
65 { 1, MAX77802_REG_PMIC_BUCK3CTRL1, MAX77802_BUCK_TYPE2_ON |
66 MAX77802_BUCK_TYPE2_IGNORE_PWRREQ },
67 { 0, MAX77802_REG_PMIC_BUCK4DVS1, MAX77802_BUCK4DVS1_1V },
68 { 1, MAX77802_REG_PMIC_BUCK4CTRL1, MAX77802_BUCK_TYPE2_ON |
69 MAX77802_BUCK_TYPE2_IGNORE_PWRREQ },
70 { 0, MAX77802_REG_PMIC_BUCK6DVS1, MAX77802_BUCK6DVS1_1V },
71 { 1, MAX77802_REG_PMIC_BUCK6CTRL, MAX77802_BUCK_TYPE1_ON |
Ronald G. Minnich88ac9b52013-06-26 17:28:52 -070072 MAX77802_BUCK_TYPE1_IGNORE_PWRREQ },
David Hendricks1f9f04e2013-08-01 18:57:52 -070073 /* Disable Boost(bypass) OUTPUT */
74 { 0, MAX77802_REG_PMIC_BOOSTCTRL, MAX77802_BOOSTCTRL_OFF},
David Hendricks1e3e2c52013-06-14 16:08:05 -070075};
76
David Hendricks77acf422013-08-05 21:04:16 -070077static int setup_power(int is_resume)
Gabe Blackd3163ab2013-05-16 05:53:40 -070078{
79 int error = 0;
David Hendricks1e3e2c52013-06-14 16:08:05 -070080 int i;
Gabe Blackd3163ab2013-05-16 05:53:40 -070081
82 power_init();
83
Hung-Te Linda7b8e42013-06-28 17:27:17 +080084 if (is_resume) {
David Hendricks77acf422013-08-05 21:04:16 -070085 return 0;
Hung-Te Linda7b8e42013-06-28 17:27:17 +080086 }
87
Gabe Blackd3163ab2013-05-16 05:53:40 -070088 /* Initialize I2C bus to configure PMIC. */
David Hendricks1e3e2c52013-06-14 16:08:05 -070089 exynos_pinmux_i2c4();
David Hendricks77acf422013-08-05 21:04:16 -070090 i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */
Gabe Blackd3163ab2013-05-16 05:53:40 -070091
David Hendricks1e3e2c52013-06-14 16:08:05 -070092 for (i = 0; i < ARRAY_SIZE(pmic_writes); i++) {
93 uint8_t data = 0;
94 uint8_t reg = pmic_writes[i].reg;
Gabe Blackd3163ab2013-05-16 05:53:40 -070095
David Hendricks1e3e2c52013-06-14 16:08:05 -070096 if (pmic_writes[i].or_orig)
Gabe Blackcdb61a62014-04-07 18:45:14 -070097 error |= i2c_readb(4, MAX77802_I2C_ADDR, reg, &data);
98
David Hendricks1e3e2c52013-06-14 16:08:05 -070099 data |= pmic_writes[i].val;
Gabe Blackcdb61a62014-04-07 18:45:14 -0700100 error |= i2c_writeb(4, MAX77802_I2C_ADDR, reg, data);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700101 }
David Hendricks1e3e2c52013-06-14 16:08:05 -0700102
David Hendricks77acf422013-08-05 21:04:16 -0700103 return error;
Gabe Blackd3163ab2013-05-16 05:53:40 -0700104}
105
Hung-Te Linc357aed2013-06-24 20:02:01 +0800106static void setup_ec(void)
107{
108 /* SPI2 (EC) is slower and needs to work in half-duplex mode with
109 * single byte bus width. */
Gabe Black98018092013-07-24 06:18:20 -0700110 clock_set_rate(PERIPH_ID_SPI2, 5000000);
Hung-Te Linc357aed2013-06-24 20:02:01 +0800111 exynos_pinmux_spi2();
112}
113
Gabe Blackd3163ab2013-05-16 05:53:40 -0700114static void setup_gpio(void)
115{
Gabe Black63bb6102013-06-19 03:29:45 -0700116 gpio_direction_input(GPIO_X30); // WP_GPIO
117 gpio_set_pull(GPIO_X30, GPIO_PULL_NONE);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700118
Gabe Black63bb6102013-06-19 03:29:45 -0700119 gpio_direction_input(GPIO_X07); // RECMODE_GPIO
120 gpio_set_pull(GPIO_X07, GPIO_PULL_NONE);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700121
Gabe Black63bb6102013-06-19 03:29:45 -0700122 gpio_direction_input(GPIO_X34); // LID_GPIO
123 gpio_set_pull(GPIO_X34, GPIO_PULL_NONE);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700124
Gabe Black63bb6102013-06-19 03:29:45 -0700125 gpio_direction_input(GPIO_X12); // POWER_GPIO
126 gpio_set_pull(GPIO_X12, GPIO_PULL_NONE);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700127}
128
129static void setup_memory(struct mem_timings *mem, int is_resume)
130{
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700131 printk(BIOS_SPEW, "manufacturer: 0x%x type: 0x%x, div: 0x%x, mhz: %d\n",
Gabe Blackd3163ab2013-05-16 05:53:40 -0700132 mem->mem_manuf,
133 mem->mem_type,
134 mem->mpll_mdiv,
135 mem->frequency_mhz);
136
Gabe Blackd3163ab2013-05-16 05:53:40 -0700137 if (ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE, !is_resume)) {
138 die("Failed to initialize memory controller.\n");
139 }
140}
141
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700142#define PRIMITIVE_MEM_TEST 0
143#if PRIMITIVE_MEM_TEST
144static unsigned long primitive_mem_test(void)
Gabe Blackd3163ab2013-05-16 05:53:40 -0700145{
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700146 unsigned long *l = (void *)0x40000000;
147 int bad = 0;
148 unsigned long i;
149 for(i = 0; i < 256*1048576; i++){
150 if (! (i%1048576))
151 printk(BIOS_SPEW, "%lu ...", i);
152 l[i] = 0xffffffff - i;
Gabe Blackd3163ab2013-05-16 05:53:40 -0700153 }
Gabe Black5420e092013-05-17 11:29:22 -0700154
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700155 for(i = 0; i < 256*1048576; i++){
156 if (! (i%1048576))
157 printk(BIOS_SPEW, "%lu ...", i);
158 if (l[i] != (0xffffffff - i)){
159 printk(BIOS_SPEW, "%p: want %08lx got %08lx\n", l, l[i], 0xffffffff - i);
160 bad++;
161 }
162 }
Gabe Black5420e092013-05-17 11:29:22 -0700163
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700164 printk(BIOS_SPEW, "%d errors\n", bad);
165
166 return bad;
Gabe Blackd3163ab2013-05-16 05:53:40 -0700167}
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700168#else
169#define primitive_mem_test()
170#endif
171
172#define SIMPLE_SPI_TEST 0
173#if SIMPLE_SPI_TEST
174/* here is a simple SPI debug test, known to fid trouble */
175static void simple_spi_test(void)
176{
Aaron Durbin899d13d2015-05-15 23:39:23 -0500177 const struct region_device *boot_dev;
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700178 int i, amt = 4 * MiB, errors = 0;
179 //u32 *data = (void *)0x40000000;
180 u32 data[1024];
181 u32 in;
182
Aaron Durbin899d13d2015-05-15 23:39:23 -0500183 boot_device_init();
184 boot_dev = boot_device_ro();
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700185 amt = sizeof(data);
Aaron Durbin899d13d2015-05-15 23:39:23 -0500186 if (boot_dev == NULL) {
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700187 printk(BIOS_SPEW, "Failed to initialize default media.\n");
188 return;
189 }
190
Aaron Durbin899d13d2015-05-15 23:39:23 -0500191 if (rdev_readat(boot_dev, data, 0, amt) < amt) {
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700192 printk(BIOS_SPEW, "simple_spi_test fails\n");
193 return;
194 }
195
196
197 for(i = 0; i < amt; i += 4){
Aaron Durbin899d13d2015-05-15 23:39:23 -0500198 if (rdev_readat(boot_dev, &in, i, 4) < 4) {
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700199 printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i);
200 return;
201 }
202 if (data[i/4] != in){
203 errors++;
204 printk(BIOS_SPEW, "BAD at %d(%p):\nRAM %08lx\nSPI %08lx\n",
205 i, &data[i/4], (unsigned long)data[i/4], (unsigned long)in);
206 /* reread it to see which is wrong. */
Aaron Durbin899d13d2015-05-15 23:39:23 -0500207 if (rdev_readat(boot_dev, &in, i, 4) < 4) {
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700208 printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i);
209 return;
210 }
211 printk(BIOS_SPEW, "RTRY at %d(%p):\nRAM %08lx\nSPI %08lx\n",
212 i, &data[i/4], (unsigned long)data[i/4], (unsigned long)in);
213 }
214
215 }
216 printk(BIOS_SPEW, "%d errors\n", errors);
217}
218#else
219#define simple_spi_test()
220#endif
Gabe Blackd3163ab2013-05-16 05:53:40 -0700221
222void main(void)
223{
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700224
225 extern struct mem_timings mem_timings;
Gabe Blackd3163ab2013-05-16 05:53:40 -0700226 int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);
David Hendricks77acf422013-08-05 21:04:16 -0700227 int power_init_failed;
228
Hung-Te Lin0682cfe2013-08-06 20:37:55 +0800229 exynos5420_config_smp();
David Hendricks77acf422013-08-05 21:04:16 -0700230 power_init_failed = setup_power(is_resume);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700231
Kyösti Mälkkif48b38b2014-12-31 08:50:36 +0200232 timestamp_init(timestamp_get());
233 timestamp_add_now(TS_START_ROMSTAGE);
234
Gabe Blackd3163ab2013-05-16 05:53:40 -0700235 /* Clock must be initialized before console_init, otherwise you may need
236 * to re-initialize serial console drivers again. */
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700237 system_clock_init();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700238
Gabe Black136e7092013-08-09 00:31:09 -0700239 exynos_pinmux_uart3();
Stefan Reinauer998ab0d2013-05-20 12:29:37 -0700240 console_init();
Julius Werner85620db2013-11-13 18:22:15 -0800241 exception_init();
Stefan Reinauer998ab0d2013-05-20 12:29:37 -0700242
David Hendricks77acf422013-08-05 21:04:16 -0700243 if (power_init_failed)
244 die("Failed to intialize power.\n");
245
246 /* re-initialize PMIC I2C channel after (re-)setting system clocks */
247 i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */
248
Kyösti Mälkkif48b38b2014-12-31 08:50:36 +0200249 timestamp_add_now(TS_BEFORE_INITRAM);
250
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700251 setup_memory(&mem_timings, is_resume);
252
Kyösti Mälkkif48b38b2014-12-31 08:50:36 +0200253 timestamp_add_now(TS_AFTER_INITRAM);
254
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700255 primitive_mem_test();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700256
Gabe Black8128a562013-09-18 05:48:37 -0700257 trustzone_init();
258
Gabe Blackd3163ab2013-05-16 05:53:40 -0700259 if (is_resume) {
260 wakeup();
261 }
262
Gabe Blackd3163ab2013-05-16 05:53:40 -0700263 setup_gpio();
Hung-Te Linc357aed2013-06-24 20:02:01 +0800264 setup_ec();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700265
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700266 simple_spi_test();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700267 /* Set SPI (primary CBFS media) clock to 50MHz. */
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700268 /* if this is uncommented SPI will not work correctly. */
Gabe Blackd3163ab2013-05-16 05:53:40 -0700269 clock_set_rate(PERIPH_ID_SPI1, 50000000);
Julius Werner45d2ff32013-08-12 18:04:06 -0700270 exynos_pinmux_spi1();
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700271 simple_spi_test();
Stefan Reinauer80e62932013-07-29 15:52:23 -0700272
273 cbmem_initialize_empty();
274
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700275 simple_spi_test();
Kyösti Mälkkif48b38b2014-12-31 08:50:36 +0200276
Aaron Durbine4f3e7a2015-03-17 13:25:19 -0500277 run_ramstage();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700278}