blob: 8e1e1b9b201fe3b27587e6c7834b6d56b2e16df7 [file] [log] [blame]
Hannah Williams5e83e8b2018-02-09 18:35:17 -08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2018 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <baseboard/variants.h>
17#include <boot/coreboot_tables.h>
18#include <ec/google/chromeec/ec.h>
19#include <gpio.h>
20#include <vendorcode/google/chromeos/chromeos.h>
21#include <soc/gpio.h>
22#include <variant/gpio.h>
23
24void fill_lb_gpios(struct lb_gpios *gpios)
25{
26 struct lb_gpio chromeos_gpios[] = {
27 {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
28 {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
29 {-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
30 {-1, ACTIVE_HIGH, 0, "power"},
31 {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
32 {-1, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"},
33 };
34 lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
35}
36
37int get_write_protect_state(void)
38{
39 return gpio_get(GPIO_PCH_WP);
40}
41
42void mainboard_chromeos_acpi_generate(void)
43{
44 const struct cros_gpio *gpios;
45 size_t num;
46
47 gpios = variant_cros_gpios(&num);
48 chromeos_acpi_gpio_generate(gpios, num);
49}