blob: 3316027d4a984c1599e3f1704987bda88305880f [file] [log] [blame]
Vadim Bendebury92c2f5e2016-04-04 16:57:05 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2016 Rockchip Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <arch/io.h>
17#include <console/console.h>
18#include <gpio.h>
19#include <soc/addressmap.h>
20#include <soc/gpio.h>
21#include <soc/grf.h>
22#include <soc/soc.h>
23#include <stdlib.h>
24
25struct rockchip_gpio_regs *gpio_port[] = {
26 (struct rockchip_gpio_regs *)GPIO0_BASE,
27 (struct rockchip_gpio_regs *)GPIO1_BASE,
28 (struct rockchip_gpio_regs *)GPIO2_BASE,
29 (struct rockchip_gpio_regs *)GPIO3_BASE,
30 (struct rockchip_gpio_regs *)GPIO4_BASE,
31};
32
33#define PMU_GPIO_PORT0 0
34#define PMU_GPIO_PORT1 1
35
36int is_pmu_gpio(gpio_t gpio)
37{
38 if (gpio.port == PMU_GPIO_PORT0 || gpio.port == PMU_GPIO_PORT1)
39 return 1;
40 return 0;
41}
42
43void *gpio_grf_reg(gpio_t gpio)
44{
45 if (is_pmu_gpio(gpio))
46 return &rk3399_pmugrf->gpio0_p[gpio.port][gpio.bank];
47 /* There are two pmu gpio, 0 and 1, so " - 2" */
48 return &rk3399_grf->gpio2_p[(gpio.port - 2)][gpio.bank];
49}
Shunqian Zheng74bb4122016-05-17 14:00:04 +080050
51#define IS_GPIO_BANK(g, p, b) (g.port == p && g.bank == GPIO_##b)
52
53enum {
54 PULLNONE_1V8 = 0,
55 PULLDOWN_1V8 = 1,
56 PULLUP_1V8 = 3,
57};
58
Julius Werner2768a112016-09-01 22:55:58 -070059u32 gpio_get_pull_val(gpio_t gpio, enum gpio_pull pull)
Shunqian Zheng74bb4122016-05-17 14:00:04 +080060{
61 /* The default pull bias setting defined in soc/gpio.h */
62 u32 pull_val = pull;
63
64 /* GPIO0_A, GPIO0_B, GPIO2_C, GPIO2_D use the 1V8 pull bias setting.
65 * Defined in TRM V.03 Part1 Page 331 and Page 458
66 */
67 if (IS_GPIO_BANK(gpio, 0, A) || IS_GPIO_BANK(gpio, 0, B) ||
68 IS_GPIO_BANK(gpio, 2, C) || IS_GPIO_BANK(gpio, 2, D)) {
69 switch (pull) {
Julius Werner2768a112016-09-01 22:55:58 -070070 case GPIO_PULLUP:
Shunqian Zheng74bb4122016-05-17 14:00:04 +080071 pull_val = PULLUP_1V8;
72 break;
Julius Werner2768a112016-09-01 22:55:58 -070073 case GPIO_PULLDOWN:
Shunqian Zheng74bb4122016-05-17 14:00:04 +080074 pull_val = PULLDOWN_1V8;
75 break;
Julius Werner2768a112016-09-01 22:55:58 -070076 case GPIO_PULLNONE:
Shunqian Zheng74bb4122016-05-17 14:00:04 +080077 pull_val = PULLNONE_1V8;
78 }
79 }
80
81 return pull_val;
82}