Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 AMD |
| 5 | * Written by Yinghai Lu <yinghailu@amd.com> for AMD. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <console/console.h> |
| 19 | #include <device/pci.h> |
| 20 | #include <device/pci_ids.h> |
| 21 | #include <string.h> |
| 22 | #include <stdint.h> |
Stefan Reinauer | 9a16e3e | 2010-03-29 14:45:36 +0000 | [diff] [blame] | 23 | #include <cpu/amd/multicore.h> |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 24 | |
| 25 | #include <cpu/amd/amdk8_sysconf.h> |
| 26 | #include <stdlib.h> |
| 27 | |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 28 | // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables |
| 29 | //busnum is default |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 30 | unsigned char bus_mcp55[8]; //1 |
| 31 | unsigned apicid_mcp55; |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 32 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 33 | unsigned char bus_pcix[3]; // under bus_mcp55_2 |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 34 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 35 | unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not |
| 36 | //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail |
| 37 | 0x0000ff0, |
| 38 | 0x0000ff0, |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 39 | // 0x0000ff0, |
| 40 | // 0x0000ff0, |
| 41 | // 0x0000ff0, |
| 42 | // 0x0000ff0, |
| 43 | // 0x0000ff0, |
| 44 | // 0x0000ff0 |
| 45 | }; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 46 | |
| 47 | unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 48 | 0x20202020, |
| 49 | 0x20202020, |
| 50 | // 0x20202020, |
| 51 | // 0x20202020, |
| 52 | // 0x20202020, |
| 53 | // 0x20202020, |
| 54 | // 0x20202020, |
| 55 | // 0x20202020, |
| 56 | }; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 57 | |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 58 | unsigned sbdnb; |
| 59 | |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 60 | static unsigned get_bus_conf_done = 0; |
| 61 | |
| 62 | void get_bus_conf(void) |
| 63 | { |
| 64 | |
| 65 | unsigned apicid_base; |
| 66 | unsigned sbdn; |
| 67 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 68 | device_t dev; |
| 69 | int i; |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 70 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 71 | if (get_bus_conf_done == 1) |
| 72 | return; //do it only once |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 73 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 74 | get_bus_conf_done = 1; |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 75 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 76 | sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); |
| 77 | for (i = 0; i < sysconf.hc_possible_num; i++) { |
| 78 | sysconf.pci1234[i] = pci1234x[i]; |
| 79 | sysconf.hcdn[i] = hcdnx[i]; |
| 80 | } |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 81 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 82 | get_sblk_pci1234(); |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 83 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 84 | sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 85 | sbdn = sysconf.sbdn; |
| 86 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 87 | sbdnb = (sysconf.hcdn[1] & 0xff); // first byte of second chain |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 88 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 89 | for (i = 0; i < 8; i++) { |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 90 | bus_mcp55[i] = 0; |
| 91 | } |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 92 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 93 | for (i = 0; i < 3; i++) { |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 94 | bus_pcix[i] = 0; |
| 95 | } |
| 96 | |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 97 | bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff; |
| 98 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 99 | /* MCP55 */ |
| 100 | dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06, 0)); |
| 101 | if (dev) { |
| 102 | bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 103 | bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS); |
| 104 | bus_mcp55[2]++; |
| 105 | } else { |
| 106 | printk(BIOS_DEBUG, |
| 107 | "ERROR - could not find PCI 1:%02x.0, using defaults\n", |
| 108 | sbdn + 0x06); |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 109 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 110 | bus_mcp55[1] = 2; |
| 111 | bus_mcp55[2] = 3; |
| 112 | } |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 113 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 114 | for (i = 2; i < 8; i++) { |
| 115 | dev = |
| 116 | dev_find_slot(bus_mcp55[0], |
| 117 | PCI_DEVFN(sbdn + 0x0a + i - 2, 0)); |
| 118 | if (dev) { |
| 119 | bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 120 | } else { |
| 121 | printk(BIOS_DEBUG, |
| 122 | "ERROR - could not find PCI %02x:%02x.0, using defaults\n", |
| 123 | bus_mcp55[0], sbdn + 0x0a + i - 2); |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 124 | } |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 125 | } |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 126 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 127 | if (bus_mcp55[2]) { |
| 128 | for (i = 0; i < 2; i++) { |
| 129 | dev = dev_find_slot(bus_mcp55[2], PCI_DEVFN(0, i)); |
| 130 | if (dev) { |
| 131 | bus_pcix[0] = bus_mcp55[2]; |
| 132 | bus_pcix[i + 1] = |
| 133 | pci_read_config8(dev, PCI_SECONDARY_BUS); |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 134 | } |
| 135 | } |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 136 | } |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 137 | |
| 138 | /*I/O APICs: APIC ID Version State Address*/ |
Timothy Pearson | d4bbfe8 | 2015-10-27 16:48:36 -0500 | [diff] [blame] | 139 | if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) |
| 140 | apicid_base = get_apicid_base(1); |
| 141 | else |
| 142 | apicid_base = CONFIG_MAX_PHYSICAL_CPUS; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 143 | apicid_mcp55 = apicid_base + 0; |
Marc Jones | 5dd4a20 | 2009-03-20 16:36:05 +0000 | [diff] [blame] | 144 | |
| 145 | } |