blob: f8a2d832d3c3ea2106c21e1ef97c9c7abd31ec38 [file] [log] [blame]
Timothy Pearson4551b682015-11-24 14:12:08 -06001chip northbridge/amd/amdfam10/root_complex # Root complex
2 device cpu_cluster 0 on # (L)APIC cluster
3 chip cpu/amd/socket_F_1207 # CPU socket
4 device lapic 0 on end # Local APIC of the CPU
5 end
6 end
7 device domain 0 on # PCI domain
8 subsystemid 0x1043 0x8163 inherit
9 chip northbridge/amd/amdfam10 # Northbridge / RAM controller
Timothy Pearsonb251a502015-11-24 14:17:49 -060010 register "maximum_memory_capacity" = "0x2000000000" # 128GB
Timothy Pearson4551b682015-11-24 14:12:08 -060011 device pci 18.0 on end # Link 0 == LDT 0
12 device pci 18.0 on end # Link 1 == LDT 1
Timothy Pearsonb251a502015-11-24 14:17:49 -060013 device pci 18.0 on # Link 2 == LDT 2 [SB on link 2]
Timothy Pearson4551b682015-11-24 14:12:08 -060014 chip southbridge/amd/sr5650 # Primary southbridge
15 device pci 0.0 on end # HT Root Complex 0x9600
16 device pci 0.1 on end # CLKCONFIG
17 device pci 0.2 on end # IOMMU
18 device pci 2.0 on # PCIE P2P bridge 0x9603 (GPP1 Port0)
19 # Slot # PCI E 1 / PCI E 2
20 end
21 device pci 3.0 off end # PCIE P2P bridge 0x960b (GPP1 Port1)
22 device pci 4.0 on # PCIE P2P bridge 0x9604 (GPP3a Port0)
23 # PIKE SAS
24 end
25 device pci 5.0 off end # PCIE P2P bridge 0x9605 (GPP3a Port1)
26 device pci 6.0 off end # PCIE P2P bridge 0x9606 (GPP3a Port2)
27 device pci 7.0 off end # PCIE P2P bridge 0x9607 (GPP3a Port3)
28 device pci 8.0 off end # NB/SB Link P2P bridge
29 device pci 9.0 on # Bridge (GPP3a Port4)
30 # Onboard # NIC A
31 end
32 device pci a.0 on # Bridge (GPP3a Port5)
33 # Onboard # NIC B
34 end
35 device pci b.0 on # Bridge (GPP2 Port0)
36 # Slot # PCI E 4
37 end
Timothy Pearson4551b682015-11-24 14:12:08 -060038 register "gpp1_configuration" = "0" # Configuration 16:0 default
39 register "gpp2_configuration" = "1" # Configuration 8:8
40 register "gpp3a_configuration" = "2" # Configuration 4:1:1:0:0:0
Timothy Pearsonb251a502015-11-24 14:17:49 -060041 register "port_enable" = "0x0f1c" # Enable all ports except 0, 1, 5, 6, and 7
Timothy Pearson4551b682015-11-24 14:12:08 -060042 register "pcie_settling_time" = "1000000" # Allow PIKE to be detected / configured
43 end
44 chip southbridge/amd/sb700 # Secondary southbridge
45 device pci 11.0 on end # SATA
46 device pci 12.0 on end # USB
47 device pci 12.1 on end # USB
48 device pci 12.2 on end # USB
49 device pci 13.0 on end # USB
50 device pci 13.1 on end # USB
51 device pci 13.2 on end # USB
Timothy Pearson64444262016-08-19 17:26:51 -050052 device pci 14.0 on # SM
Timothy Pearson4551b682015-11-24 14:12:08 -060053 chip drivers/generic/generic # DIMM n-0-0-0
54 device i2c 50 on end
55 end
56 chip drivers/generic/generic # DIMM n-0-0-1
57 device i2c 51 on end
58 end
59 chip drivers/generic/generic # DIMM n-0-1-0
60 device i2c 52 on end
61 end
62 chip drivers/generic/generic # DIMM n-0-1-1
63 device i2c 53 on end
64 end
65 chip drivers/generic/generic # DIMM n-1-0-0
66 device i2c 54 on end
67 end
68 chip drivers/generic/generic # DIMM n-1-0-1
69 device i2c 55 on end
70 end
71 chip drivers/generic/generic # DIMM n-1-1-0
72 device i2c 56 on end
73 end
74 chip drivers/generic/generic # DIMM n-1-1-1
75 device i2c 57 on end
76 end
77 chip drivers/i2c/w83795
78 register "fanin_ctl1" = "0xff" # Enable monitoring of FANIN1 - FANIN8
79 register "fanin_ctl2" = "0x00" # Connect FANIN11 - FANIN14 to alternate functions
80 register "temp_ctl1" = "0x2a" # Enable monitoring of DTS, VSEN12, and VSEN13
81 register "temp_ctl2" = "0x01" # Enable monitoring of TD1/TR1
82 register "temp_dtse" = "0x03" # Enable DTS1 and DTS2
83 register "volt_ctl1" = "0xff" # Enable monitoring of VSEN1 - VSEN8
84 register "volt_ctl2" = "0xf7" # Enable monitoring of VSEN9 - VSEN11, 3VDD, 3VSB, and VBAT
85 register "temp1_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp1)
86 register "temp2_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp2)
87 register "temp3_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp3)
88 register "temp4_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp4)
89 register "temp5_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp5)
90 register "temp6_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp6)
91 register "temp1_source_select" = "0x00" # Use TD1/TR1 as data source for Temp1
92 register "temp2_source_select" = "0x00" # Use TD2/TR2 as data source for Temp2
93 register "temp3_source_select" = "0x00" # Use TD3/TR3 as data source for Temp3
94 register "temp4_source_select" = "0x00" # Use TD4/TR4 as data source for Temp4
95 register "temp5_source_select" = "0x00" # Use TR5 as data source for Temp5
96 register "temp6_source_select" = "0x00" # Use TR6 as data source for Temp6
97 register "tr1_critical_temperature" = "85" # Set TD1/TR1 critical temperature to 85°C
98 register "tr1_critical_hysteresis" = "80" # Set TD1/TR1 critical hysteresis temperature to 80°C
99 register "tr1_warning_temperature" = "70" # Set TD1/TR1 warning temperature to 70°C
100 register "tr1_warning_hysteresis" = "65" # Set TD1/TR1 warning hysteresis temperature to 65°C
101 register "dts_critical_temperature" = "85" # Set DTS (CPU) critical temperature to 85°C
102 register "dts_critical_hysteresis" = "80" # Set DTS (CPU) critical hysteresis temperature to 80°C
103 register "dts_warning_temperature" = "70" # Set DTS (CPU) warning temperature to 70°C
104 register "dts_warning_hysteresis" = "65" # Set DTS (CPU) warning hysteresis temperature to 65°C
105 register "temp1_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
106 register "temp2_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
107 register "temp3_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
108 register "temp4_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
109 register "temp5_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
110 register "temp6_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
111 register "temp1_target_temperature" = "80" # Set Temp1 target temperature to 80°C
112 register "temp2_target_temperature" = "80" # Set Temp1 target temperature to 80°C
113 register "temp3_target_temperature" = "80" # Set Temp1 target temperature to 80°C
114 register "temp4_target_temperature" = "80" # Set Temp1 target temperature to 80°C
115 register "temp5_target_temperature" = "80" # Set Temp1 target temperature to 80°C
116 register "temp6_target_temperature" = "80" # Set Temp1 target temperature to 80°C
117 register "fan1_nonstop" = "7" # Set Fan 1 minimum speed
118 register "fan2_nonstop" = "7" # Set Fan 2 minimum speed
119 register "fan3_nonstop" = "7" # Set Fan 3 minimum speed
120 register "fan4_nonstop" = "7" # Set Fan 4 minimum speed
121 register "fan5_nonstop" = "7" # Set Fan 5 minimum speed
122 register "fan6_nonstop" = "7" # Set Fan 6 minimum speed
123 register "fan7_nonstop" = "7" # Set Fan 7 minimum speed
124 register "fan8_nonstop" = "7" # Set Fan 8 minimum speed
125 register "default_speed" = "100" # All fans to full speed on power up
126 register "fan1_duty" = "100" # Fan 1 to full speed
127 register "fan2_duty" = "100" # Fan 2 to full speed
128 register "fan3_duty" = "100" # Fan 3 to full speed
129 register "fan4_duty" = "100" # Fan 4 to full speed
130 register "fan5_duty" = "100" # Fan 5 to full speed
131 register "fan6_duty" = "100" # Fan 6 to full speed
132 register "fan7_duty" = "100" # Fan 7 to full speed
133 register "fan8_duty" = "100" # Fan 8 to full speed
134 register "vcore1_high_limit_mv" = "1500" # VCORE1 (Node 0) high limit to 1.5V
135 register "vcore1_low_limit_mv" = "900" # VCORE1 (Node 0) low limit to 0.9V
136 register "vcore2_high_limit_mv" = "1500" # VCORE2 (Node 1) high limit to 1.5V
137 register "vcore2_low_limit_mv" = "900" # VCORE2 (Node 1) low limit to 0.9V
138 register "vsen3_high_limit_mv" = "1600" # VSEN1 (Node 0 RAM voltage) high limit to 1.6V
139 register "vsen3_low_limit_mv" = "1100" # VSEN1 (Node 0 RAM voltage) low limit to 1.1V
140 register "vsen4_high_limit_mv" = "1600" # VSEN2 (Node 1 RAM voltage) high limit to 1.6V
141 register "vsen4_low_limit_mv" = "1100" # VSEN2 (Node 1 RAM voltage) low limit to 1.1V
142 register "vsen5_high_limit_mv" = "1250" # VSEN5 (Node 0 HT link voltage) high limit to 1.25V
143 register "vsen5_low_limit_mv" = "1150" # VSEN5 (Node 0 HT link voltage) low limit to 1.15V
144 register "vsen6_high_limit_mv" = "1250" # VSEN6 (Node 1 HT link voltage) high limit to 1.25V
145 register "vsen6_low_limit_mv" = "1150" # VSEN6 (Node 1 HT link voltage) low limit to 1.15V
Timothy Pearsonb251a502015-11-24 14:17:49 -0600146 register "vsen7_high_limit_mv" = "1150" # VSEN7 (Northbridge core voltage) high limit to 1.15V
Timothy Pearson4551b682015-11-24 14:12:08 -0600147 register "vsen7_low_limit_mv" = "1050" # VSEN7 (Northbridge core voltage) low limit to 1.05V
148 register "vsen8_high_limit_mv" = "1900" # VSEN8 (+1.8V) high limit to 1.9V
149 register "vsen8_low_limit_mv" = "1700" # VSEN8 (+1.8V) low limit to 1.7V
150 register "vsen9_high_limit_mv" = "1250" # VSEN9 (+1.2V) high limit to 1.25V
151 register "vsen9_low_limit_mv" = "1150" # VSEN9 (+1.2V) low limit to 1.15V
152 register "vsen10_high_limit_mv" = "1150" # VSEN10 (+1.1V) high limit to 1.15V
153 register "vsen10_low_limit_mv" = "1050" # VSEN10 (+1.1V) low limit to 1.05V
154 register "vsen11_high_limit_mv" = "1625" # VSEN11 (5VSB, scaling factor ~3.2) high limit to 5.2V
155 register "vsen11_low_limit_mv" = "1500" # VSEN11 (5VSB, scaling factor ~3.2) low limit to 4.8V
156 register "vsen12_high_limit_mv" = "1083" # VSEN12 (+12V, scaling factor ~12) high limit to 13V
157 register "vsen12_low_limit_mv" = "917" # VSEN12 (+12V, scaling factor ~12) low limit to 11V
158 register "vsen13_high_limit_mv" = "1625" # VSEN13 (+5V, scaling factor ~3.2) high limit to 5.2V
159 register "vsen13_low_limit_mv" = "1500" # VSEN13 (+5V, scaling factor ~3.2) low limit to 4.8V
160 register "vdd_high_limit_mv" = "3500" # 3VDD high limit to 3.5V
161 register "vdd_low_limit_mv" = "3100" # 3VDD low limit to 3.1V
162 register "vsb_high_limit_mv" = "3500" # 3VSB high limit to 3.5V
163 register "vsb_low_limit_mv" = "3100" # 3VSB low limit to 3.1V
164 register "vbat_high_limit_mv" = "3500" # VBAT (+3V) high limit to 3.5V
165 register "vbat_low_limit_mv" = "2500" # VBAT (+3V) low limit to 2.5V
166 register "smbus_aux" = "1" # Device located on auxiliary SMBUS controller
167 device i2c 0x2f on end
168 end
169 end
170 device pci 14.1 on end # IDE 0x439c
171 device pci 14.2 on end # HDA 0x4383 (ASUS MIO add-on card)
172 device pci 14.3 on # LPC 0x439d (SMBUS primary controller)
173 chip superio/winbond/w83667hg-a # Super I/O
174 device pnp 2e.0 off end # FDC; Not available on the KCMA-D8
175 device pnp 2e.1 off end # LPT1; Not available on the KCMA-D8
Timothy Pearson64444262016-08-19 17:26:51 -0500176 device pnp 2e.2 on # COM1
Timothy Pearson4551b682015-11-24 14:12:08 -0600177 io 0x60 = 0x3f8
178 irq 0x70 = 4
179 end
180 device pnp 2e.3 on # COM2
181 io 0x60 = 0x2f8
182 irq 0x70 = 3
183 end
184 device pnp 2e.5 on # PS/2 keyboard & mouse
185 io 0x60 = 0x60
186 io 0x62 = 0x64
187 irq 0x70 = 1
188 irq 0x72 = 12
189 end
190 device pnp 2e.106 off end # SPI: Not available on the KCMA-D8
191 device pnp 2e.107 off end # GIPO6
192 device pnp 2e.207 off end # GIPO7
193 device pnp 2e.307 off end # GIPO8
194 device pnp 2e.407 off end # GIPO9
195 device pnp 2e.8 off end # WDT
196 device pnp 2e.108 off end # GPIO 1
197 device pnp 2e.9 off end # GPIO2
198 device pnp 2e.109 off end # GPIO3
199 device pnp 2e.209 off end # GPIO4
200 device pnp 2e.309 off end # GPIO5
201 device pnp 2e.a on end # ACPI
202 device pnp 2e.b on # HW Monitor
203 io 0x60 = 0x290
Timothy Pearson7f53b982016-04-11 23:45:00 -0500204 # IRQ purposefully not assigned to prevent lockups
Timothy Pearson4551b682015-11-24 14:12:08 -0600205 end
206 device pnp 2e.c off end # PECI
207 device pnp 2e.d off end # VID_BUSSEL
208 device pnp 2e.f off end # GPIO_PP_OD
209 end
210 end
211 device pci 14.4 on # Bridge
Timothy Pearsonb251a502015-11-24 14:17:49 -0600212 device pci 1.0 on # Slot
Timothy Pearson4551b682015-11-24 14:12:08 -0600213 # Slot # PCI 0
214 end
Timothy Pearsonb251a502015-11-24 14:17:49 -0600215 device pci 2.0 on # Slot
216 # Slot # PCI 1
217 end
218 device pci 3.0 on # Slot
219 # Slot # PCI 2
220 end
221 device pci 5.0 on end # VGA
Timothy Pearson4551b682015-11-24 14:12:08 -0600222 end
223 device pci 14.5 on end # USB OHCI2 0x4399
224 end
225 end
226 device pci 18.1 on end
227 device pci 18.2 on end
228 device pci 18.3 on end
229 device pci 18.4 on end
230 device pci 18.5 on end
Timothy Pearsonb251a502015-11-24 14:17:49 -0600231 device pci 19.0 on end # Socket 1 node 0
Timothy Pearson4551b682015-11-24 14:12:08 -0600232 device pci 19.1 on end
233 device pci 19.2 on end
234 device pci 19.3 on end
235 device pci 19.4 on end
236 device pci 19.5 on end
Timothy Pearson4551b682015-11-24 14:12:08 -0600237 end
238 end
239end