Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Marshall Dawson | 4bbea90 | 2016-10-08 09:53:58 -0600 | [diff] [blame] | 4 | * Copyright (C) 2015-2016 Advanced Micro Devices, Inc. |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <device/pci_def.h> |
| 17 | #include <device/device.h> |
| 18 | #include "AGESA.h" |
| 19 | #include "amdlib.h" |
| 20 | #include <northbridge/amd/pi/BiosCallOuts.h> |
| 21 | #include <northbridge/amd/pi/00670F00/chip.h> |
| 22 | #include "Ids.h" |
| 23 | #include "heapManager.h" |
| 24 | #include "FchPlatform.h" |
| 25 | #include "cbfs.h" |
| 26 | #if IS_ENABLED(CONFIG_HUDSON_IMC_FWM) |
| 27 | #include "imc.h" |
| 28 | #endif |
| 29 | #include "hudson.h" |
| 30 | #include <stdlib.h> |
| 31 | #include "BiosCallOuts.h" |
| 32 | #include "northbridge/amd/pi/dimmSpd.h" |
| 33 | #include "northbridge/amd/pi/agesawrapper.h" |
| 34 | #include <PlatformMemoryConfiguration.h> |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 35 | |
| 36 | static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 37 | |
| 38 | const BIOS_CALLOUT_STRUCT BiosCallouts[] = |
| 39 | { |
| 40 | {AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer }, |
| 41 | {AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer }, |
| 42 | {AGESA_LOCATE_BUFFER, agesa_LocateBuffer }, |
Marshall Dawson | 4bbea90 | 2016-10-08 09:53:58 -0600 | [diff] [blame] | 43 | {AGESA_READ_SPD, agesa_ReadSpd }, |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 44 | {AGESA_DO_RESET, agesa_Reset }, |
| 45 | {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, |
| 46 | {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, |
| 47 | {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, |
| 48 | {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, |
| 49 | {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, |
| 50 | {AGESA_FCH_OEM_CALLOUT, Fch_Oem_config }, |
| 51 | {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage } |
| 52 | }; |
| 53 | const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); |
| 54 | |
| 55 | static const GPIO_CONTROL oem_gardenia_gpio[] = { |
Marshall Dawson | c3cd6d7 | 2016-10-11 10:54:33 -0400 | [diff] [blame] | 56 | /* BT radio disable */ |
| 57 | {14, Function1, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE |
| 58 | | FCH_GPIO_OUTPUT_ENABLE}, |
| 59 | /* NFC PU */ |
| 60 | {64, Function0, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE |
| 61 | | FCH_GPIO_OUTPUT_ENABLE}, |
| 62 | /* NFC wake */ |
| 63 | {65, Function0, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE |
| 64 | | FCH_GPIO_OUTPUT_ENABLE}, |
| 65 | /* Webcam */ |
| 66 | {66, Function0, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE |
| 67 | | FCH_GPIO_OUTPUT_ENABLE}, |
| 68 | /* PCIe presence detect */ |
| 69 | {69, Function0, FCH_GPIO_PULL_UP_ENABLE}, |
| 70 | /* GPS sleep */ |
| 71 | {70, Function0, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE |
| 72 | | FCH_GPIO_OUTPUT_ENABLE}, |
| 73 | /* MUX for Power Express Eval */ |
| 74 | {116, Function1, FCH_GPIO_PULL_DOWN_ENABLE}, |
| 75 | /* SD power */ |
| 76 | {119, Function2, FCH_GPIO_PULL_UP_ENABLE | FCH_GPIO_OUTPUT_VALUE |
| 77 | | FCH_GPIO_OUTPUT_ENABLE}, |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 78 | {-1} |
| 79 | }; |
| 80 | /** |
| 81 | * Fch Oem setting callback |
| 82 | * |
| 83 | * Configure platform specific Hudson device, |
| 84 | * such as Azalia, SATA, IMC etc. |
| 85 | */ |
| 86 | AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) |
| 87 | { |
| 88 | AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; |
| 89 | |
| 90 | if (StdHeader->Func == AMD_INIT_RESET) { |
| 91 | FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData; |
| 92 | printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); |
Marshall Dawson | ec6912b | 2016-10-20 14:01:32 -0400 | [diff] [blame] | 93 | FchParams_reset->FchReset.SataEnable = hudson_sata_enable(); |
| 94 | FchParams_reset->FchReset.IdeEnable = hudson_ide_enable(); |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 95 | FchParams_reset->EarlyOemGpioTable = oem_gardenia_gpio; |
| 96 | } else if (StdHeader->Func == AMD_INIT_ENV) { |
| 97 | FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; |
| 98 | printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); |
| 99 | #if IS_ENABLED(CONFIG_HUDSON_IMC_FWM) |
| 100 | oem_fan_control(FchParams_env); |
| 101 | #endif |
| 102 | |
| 103 | /* XHCI configuration */ |
| 104 | #if CONFIG_HUDSON_XHCI_ENABLE |
| 105 | FchParams_env->Usb.Xhci0Enable = TRUE; |
| 106 | #else |
| 107 | FchParams_env->Usb.Xhci0Enable = FALSE; |
| 108 | #endif |
| 109 | FchParams_env->Usb.Xhci1Enable = FALSE; |
| 110 | FchParams_env->Usb.USB30PortInit = 8; /* 8: If USB3 port is unremoveable. */ |
Marshall Dawson | ec6912b | 2016-10-20 14:01:32 -0400 | [diff] [blame] | 111 | |
| 112 | /* SATA configuration */ |
| 113 | FchParams_env->Sata.SataClass = CONFIG_HUDSON_SATA_MODE; |
| 114 | switch ((SATA_CLASS)CONFIG_HUDSON_SATA_MODE) { |
| 115 | case SataRaid: |
| 116 | case SataAhci: |
| 117 | case SataAhci7804: |
| 118 | case SataLegacyIde: |
| 119 | FchParams_env->Sata.SataIdeMode = FALSE; |
| 120 | break; |
| 121 | case SataIde2Ahci: |
| 122 | case SataIde2Ahci7804: |
| 123 | default: /* SataNativeIde */ |
| 124 | FchParams_env->Sata.SataIdeMode = TRUE; |
| 125 | break; |
| 126 | } |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 127 | } |
| 128 | printk(BIOS_DEBUG, "Done\n"); |
| 129 | |
| 130 | return AGESA_SUCCESS; |
| 131 | } |
| 132 | |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 133 | #ifdef __PRE_RAM__ |
| 134 | |
| 135 | const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = { |
| 136 | DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY), |
| 137 | NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2), |
| 138 | NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2), |
| 139 | MOTHER_BOARD_LAYERS (LAYERS_6), |
| 140 | MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00), |
| 141 | CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff), |
| 142 | ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff), |
| 143 | CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00), |
| 144 | PSO_END |
| 145 | }; |
| 146 | |
| 147 | void OemPostParams(AMD_POST_PARAMS *PostParams) |
| 148 | { |
Marshall Dawson | 4bbea90 | 2016-10-08 09:53:58 -0600 | [diff] [blame] | 149 | PostParams->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)DDR4PlatformMemoryConfiguration; |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 150 | } |
| 151 | #endif |