blob: eb7e09fcb834a637429cbccf14f985cc3ed3d3bc [file] [log] [blame]
Vadim Bendeburyab0f7102014-08-21 14:19:31 -07001#
2# This file is part of the coreboot project.
3#
4# Copyright (C) 2014 Imagination Technologies
5#
6# This program is free software; you can redistribute it and/or
7# modify it under the terms of the GNU General Public License as
8# published by the Free Software Foundation; version 2 of
9# the License.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
Patrick Georgib890a122015-03-26 15:17:45 +010018# Foundation, Inc.
Vadim Bendeburyab0f7102014-08-21 14:19:31 -070019#
20
21if BOARD_GOOGLE_URARA
22
23config BOARD_SPECIFIC_OPTIONS
24 def_bool y
Vadim Bendeburycbc44f72014-11-29 15:28:23 -080025 select BOARD_ROMSIZE_KB_512
Vadim Bendeburyab0f7102014-08-21 14:19:31 -070026 select BOOTBLOCK_CONSOLE
Vadim Bendeburyd0daeba2014-10-28 18:23:28 -070027 select MAINBOARD_HAS_CHROMEOS
Ionela Voinescudfd441d2014-11-11 13:39:18 +000028 select SPI_FLASH_WINBOND
Vadim Bendebury2d510d02014-09-29 12:43:40 -070029 select CPU_IMGTEC_PISTACHIO
Martin Roth595e7772015-04-26 18:53:26 -060030 select COMMON_CBFS_SPI_WRAPPER
Vadim Bendeburyab0f7102014-08-21 14:19:31 -070031 select SPI_FLASH
Vladimir Serbinenko1e161422015-05-30 22:47:22 +020032 select BOARD_ID_MANUAL
Vadim Bendeburyab0f7102014-08-21 14:19:31 -070033
34config MAINBOARD_DIR
35 string
36 default "google/urara"
37
38config MAINBOARD_PART_NUMBER
39 string
Vadim Bendebury2d510d02014-09-29 12:43:40 -070040 default "ImgTec Pistachio Virtual Platform"
Vadim Bendeburyab0f7102014-08-21 14:19:31 -070041
Ionela Voinescub3f666b2015-01-18 22:37:11 +000042config BOOTBLOCK_MAINBOARD_INIT
43 string
44 default "mainboard/google/urara/bootblock.c"
45
Vadim Bendeburyab0f7102014-08-21 14:19:31 -070046config DRAM_SIZE_MB
47 int
48 default 256
49
Ionela Voinescu33c10f82014-10-30 14:49:53 +000050config TTYS0_LCS
51 int
52 default 3
53
David Hendricks352135e2015-01-26 07:15:01 -080054config CONSOLE_SERIAL_UART_ADDRESS
55 hex
56 depends on DRIVERS_UART
57 default 0xB8101500
58
Ionela Voinescudfd441d2014-11-11 13:39:18 +000059config BOOT_MEDIA_SPI_BUS
60 int
61 default 1
62
Vadim Bendeburyab0f7102014-08-21 14:19:31 -070063endif