Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 coresystems GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2 of |
| 9 | * the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include <console/console.h> |
| 18 | #include <device/device.h> |
| 19 | #include <device/path.h> |
| 20 | #include <device/smbus.h> |
| 21 | #include <device/pci.h> |
| 22 | #include <device/pci_ids.h> |
| 23 | #include <device/pci_ops.h> |
| 24 | #include <arch/io.h> |
Arthur Heymans | 16fe790 | 2017-04-12 17:01:31 +0200 | [diff] [blame] | 25 | #include <southbridge/intel/common/smbus.h> |
| 26 | #include "i82801jx.h" |
Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame] | 27 | |
| 28 | static void pch_smbus_init(device_t dev) |
| 29 | { |
| 30 | u16 reg16; |
| 31 | |
| 32 | /* Enable clock gating */ |
| 33 | reg16 = pci_read_config16(dev, 0x80); |
| 34 | reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14)); |
| 35 | pci_write_config16(dev, 0x80, reg16); |
| 36 | } |
| 37 | |
| 38 | static int lsmbus_read_byte(device_t dev, u8 address) |
| 39 | { |
| 40 | u16 device; |
| 41 | struct resource *res; |
| 42 | struct bus *pbus; |
| 43 | |
| 44 | device = dev->path.i2c.device; |
| 45 | pbus = get_pbus_smbus(dev); |
| 46 | res = find_resource(pbus->dev, 0x20); |
| 47 | |
| 48 | return do_smbus_read_byte(res->base, device, address); |
| 49 | } |
| 50 | |
| 51 | static int lsmbus_write_byte(device_t dev, u8 address, u8 val) |
| 52 | { |
| 53 | u16 device; |
| 54 | struct resource *res; |
| 55 | struct bus *pbus; |
| 56 | |
| 57 | device = dev->path.i2c.device; |
| 58 | pbus = get_pbus_smbus(dev); |
| 59 | res = find_resource(pbus->dev, 0x20); |
| 60 | |
| 61 | return do_smbus_write_byte(res->base, device, address, val); |
| 62 | } |
| 63 | |
Arthur Heymans | 33863b6 | 2017-09-07 17:05:17 +0200 | [diff] [blame] | 64 | static int lsmbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buf) |
| 65 | { |
| 66 | u16 device; |
| 67 | struct resource *res; |
| 68 | struct bus *pbus; |
| 69 | |
| 70 | device = dev->path.i2c.device; |
| 71 | pbus = get_pbus_smbus(dev); |
| 72 | res = find_resource(pbus->dev, 0x20); |
| 73 | return do_smbus_block_write(res->base, device, cmd, bytes, buf); |
| 74 | } |
| 75 | |
| 76 | static int lsmbus_block_read(device_t dev, u8 cmd, u8 bytes, u8 *buf) |
| 77 | { |
| 78 | u16 device; |
| 79 | struct resource *res; |
| 80 | struct bus *pbus; |
| 81 | |
| 82 | device = dev->path.i2c.device; |
| 83 | pbus = get_pbus_smbus(dev); |
| 84 | res = find_resource(pbus->dev, 0x20); |
| 85 | return do_smbus_block_read(res->base, device, cmd, bytes, buf); |
| 86 | } |
| 87 | |
Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame] | 88 | static struct smbus_bus_operations lops_smbus_bus = { |
| 89 | .read_byte = lsmbus_read_byte, |
| 90 | .write_byte = lsmbus_write_byte, |
Arthur Heymans | 33863b6 | 2017-09-07 17:05:17 +0200 | [diff] [blame] | 91 | .block_read = lsmbus_block_read, |
| 92 | .block_write = lsmbus_block_write, |
Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | static void smbus_set_subsystem(device_t dev, unsigned vendor, unsigned device) |
| 96 | { |
| 97 | if (!vendor || !device) { |
| 98 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 99 | pci_read_config32(dev, PCI_VENDOR_ID)); |
| 100 | } else { |
| 101 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 102 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 103 | } |
| 104 | } |
| 105 | |
| 106 | static struct pci_operations smbus_pci_ops = { |
| 107 | .set_subsystem = smbus_set_subsystem, |
| 108 | }; |
| 109 | |
| 110 | static void smbus_read_resources(device_t dev) |
| 111 | { |
| 112 | struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4); |
| 113 | res->base = SMBUS_IO_BASE; |
| 114 | res->size = 32; |
| 115 | res->limit = res->base + res->size - 1; |
| 116 | res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | |
| 117 | IORESOURCE_STORED | IORESOURCE_ASSIGNED; |
| 118 | |
| 119 | /* Also add MMIO resource */ |
| 120 | res = pci_get_resource(dev, PCI_BASE_ADDRESS_0); |
| 121 | } |
| 122 | |
| 123 | static struct device_operations smbus_ops = { |
| 124 | .read_resources = smbus_read_resources, |
| 125 | .set_resources = pci_dev_set_resources, |
| 126 | .enable_resources = pci_dev_enable_resources, |
| 127 | .scan_bus = scan_smbus, |
| 128 | .init = pch_smbus_init, |
| 129 | .ops_smbus_bus = &lops_smbus_bus, |
| 130 | .ops_pci = &smbus_pci_ops, |
| 131 | }; |
| 132 | |
Arthur Heymans | 349e085 | 2017-04-09 20:48:37 +0200 | [diff] [blame] | 133 | static const unsigned short pci_device_ids[] = |
| 134 | { |
| 135 | 0x3a30, |
| 136 | 0x3a60, |
| 137 | 0 |
| 138 | }; |
Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame] | 139 | |
| 140 | static const struct pci_driver pch_smbus __pci_driver = { |
| 141 | .ops = &smbus_ops, |
| 142 | .vendor = PCI_VENDOR_ID_INTEL, |
| 143 | .devices = pci_device_ids, |
| 144 | }; |