huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2015 MediaTek Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 16 | #include <bootmode.h> |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 17 | #include <console/console.h> |
Lin Huang | 19eb750 | 2016-03-26 11:50:05 +0800 | [diff] [blame] | 18 | #include <cpu/cpu.h> |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 19 | #include <device/device.h> |
Lin Huang | 19eb750 | 2016-03-26 11:50:05 +0800 | [diff] [blame] | 20 | #include <soc/addressmap.h> |
Julius Werner | 7f96589 | 2016-08-29 15:07:58 -0700 | [diff] [blame] | 21 | #include <soc/clock.h> |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 22 | #include <soc/display.h> |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 23 | #include <stddef.h> |
Lin Huang | 19eb750 | 2016-03-26 11:50:05 +0800 | [diff] [blame] | 24 | #include <stdlib.h> |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 25 | #include <string.h> |
| 26 | #include <symbols.h> |
| 27 | |
| 28 | static void soc_read_resources(device_t dev) |
| 29 | { |
| 30 | ram_resource(dev, 0, (uintptr_t)_dram / KiB, |
Lin Huang | 19eb750 | 2016-03-26 11:50:05 +0800 | [diff] [blame] | 31 | min(CONFIG_DRAM_SIZE_MB * KiB, MAX_DRAM_ADDRESS / KiB)); |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 32 | } |
| 33 | |
| 34 | static void soc_init(device_t dev) |
| 35 | { |
| 36 | /* reserve bl31 image, which define in |
| 37 | * arm-trusted-firmware/plat/rockchip/rk3399/include/platform_def.h |
| 38 | */ |
Caesar Wang | 905a933 | 2016-04-28 14:37:48 +0800 | [diff] [blame] | 39 | mmio_resource(dev, 1, (0x10000 / KiB), (0x80000 / KiB)); |
Shunqian Zheng | d1cec75 | 2016-05-04 16:21:36 +0800 | [diff] [blame] | 40 | |
| 41 | if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) && display_init_required()) |
| 42 | rk_display_init(dev, (uintptr_t)_framebuffer, |
| 43 | _framebuffer_size); |
| 44 | else |
| 45 | printk(BIOS_INFO, "Display initialization disabled.\n"); |
Julius Werner | 7f96589 | 2016-08-29 15:07:58 -0700 | [diff] [blame] | 46 | |
| 47 | /* We don't need big CPUs, but bring them up as a courtesy to Linux. */ |
| 48 | rkclk_configure_cpu(APLL_600_MHZ, CPU_CLUSTER_BIG); |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 49 | } |
| 50 | |
| 51 | static struct device_operations soc_ops = { |
| 52 | .read_resources = soc_read_resources, |
| 53 | .init = soc_init, |
| 54 | }; |
| 55 | |
| 56 | static void enable_soc_dev(device_t dev) |
| 57 | { |
| 58 | dev->ops = &soc_ops; |
| 59 | } |
| 60 | |
| 61 | struct chip_operations soc_rockchip_rk3399_ops = { |
Paul Menzel | 3727776 | 2016-07-03 09:45:26 +0200 | [diff] [blame] | 62 | CHIP_NAME("SOC Rockchip RK3399") |
huang lin | c14b54d | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 63 | .enable_dev = enable_soc_dev, |
| 64 | }; |