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review.coreboot.org / coreboot / 14546853274bb21a760230ef5570d03bcb43430f / . / src / southbridge / via / vt8231 / usb.c
blob: e12a8db85ab9b2c272834b3d205d26e326188122 [file] [log] [blame]
arch import user (historical)80e3d962005-07-06 18:17:33 +0000[diff] [blame]1
2static void usb_on(int enable)
3{
4 unsigned char regval;
5
6 /* Base 8231 controller */
7 device_t dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
8 /* USB controller 1 */
9 device_t dev2 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, 0);
10 /* USB controller 2 */
11 device_t dev3 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, dev2);
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]12
arch import user (historical)80e3d962005-07-06 18:17:33 +0000[diff] [blame]13 /* enable USB1 */
14 if(dev2) {
15 if (enable) {
16 pci_write_config8(dev2, 0x3c, 0x05);
17 pci_write_config8(dev2, 0x04, 0x07);
18 } else {
19 pci_write_config8(dev2, 0x3c, 0x00);
20 pci_write_config8(dev2, 0x04, 0x00);
21 }
22 }
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]23
arch import user (historical)80e3d962005-07-06 18:17:33 +0000[diff] [blame]24 if(dev0) {
25 regval = pci_read_config8(dev0, 0x50);
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]26 if (enable)
27 regval &= ~(0x10);
arch import user (historical)80e3d962005-07-06 18:17:33 +0000[diff] [blame]28 else
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]29 regval |= 0x10;
arch import user (historical)80e3d962005-07-06 18:17:33 +0000[diff] [blame]30 pci_write_config8(dev0, 0x50, regval);
31 }
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]32
arch import user (historical)80e3d962005-07-06 18:17:33 +0000[diff] [blame]33 /* enable USB2 */
34 if(dev3) {
35 if (enable) {
36 pci_write_config8(dev3, 0x3c, 0x05);
37 pci_write_config8(dev3, 0x04, 0x07);
38 } else {
39 pci_write_config8(dev3, 0x3c, 0x00);
40 pci_write_config8(dev3, 0x04, 0x00);
41 }
42 }
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]43
arch import user (historical)80e3d962005-07-06 18:17:33 +0000[diff] [blame]44 if(dev0) {
45 regval = pci_read_config8(dev0, 0x50);
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]46 if (enable)
47 regval &= ~(0x20);
arch import user (historical)80e3d962005-07-06 18:17:33 +0000[diff] [blame]48 else
Stefan Reinauer14e22772010-04-27 06:56:47 +0000[diff] [blame]49 regval |= 0x20;
arch import user (historical)80e3d962005-07-06 18:17:33 +0000[diff] [blame]50 pci_write_config8(dev0, 0x50, regval);
51 }
52}