blob: 145e6084d95935fe402a32ea1d21a41b3aba11b8 [file] [log] [blame]
Lee Leahy77ff0b12015-05-05 15:07:29 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Lee Leahy77ff0b12015-05-05 15:07:29 -070015 */
16
17Device (LPEA)
18{
Lee Leahy32471722015-04-20 15:20:28 -070019 Name (_HID, "808622A8")
20 Name (_CID, "808622A8")
Lee Leahy77ff0b12015-05-05 15:07:29 -070021 Name (_UID, 1)
Lee Leahy32471722015-04-20 15:20:28 -070022 Name (_DDN, "Intel(R) Low Power Audio Controller - 808622A8")
Lee Leahy77ff0b12015-05-05 15:07:29 -070023 Name (_PR0, Package () { PLPE })
24
25 Name (RBUF, ResourceTemplate()
26 {
27 Memory32Fixed (ReadWrite, 0, 0x00200000, BAR0)
28 Memory32Fixed (ReadWrite, 0, 0x00001000, BAR1)
Matt DeVillier83ef07a2018-01-21 16:37:24 -060029 Memory32Fixed (ReadWrite, 0, 0x00200000, BAR2)
Lee Leahy77ff0b12015-05-05 15:07:29 -070030 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
31 {
32 LPE_DMA0_IRQ
33 }
34 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
35 {
36 LPE_DMA1_IRQ
37 }
38 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
39 {
40 LPE_SSP0_IRQ
41 }
42 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
43 {
44 LPE_SSP1_IRQ
45 }
46 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
47 {
48 LPE_SSP2_IRQ
49 }
50 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
51 {
52 LPE_IPC2HOST_IRQ
53 }
54 })
55
56 Method (_CRS)
57 {
58 /* Update BAR0 from NVS */
59 CreateDwordField (^RBUF, ^BAR0._BAS, BAS0)
60 Store (\LPB0, BAS0)
61
62 /* Update BAR1 from NVS */
63 CreateDwordField (^RBUF, ^BAR1._BAS, BAS1)
64 Store (\LPB1, BAS1)
65
66 /* Update LPE FW from NVS */
67 CreateDwordField (^RBUF, ^BAR2._BAS, BAS2)
68 Store (\LPFW, BAS2)
69
70 /* Append any Mainboard defined GPIOs */
Martin Roth10f7f502015-12-08 15:26:03 -070071 If (CondRefOf (^GBUF)) {
Lee Leahy77ff0b12015-05-05 15:07:29 -070072 ConcatenateResTemplate (^RBUF, ^GBUF, Local1)
73 Return (Local1)
74 }
75
76 Return (^RBUF)
77 }
78
79 Method (_STA)
80 {
81 If (LEqual (\LPEN, 1)) {
82 Return (0xF)
83 } Else {
84 Return (0x0)
85 }
86 }
87
88 OperationRegion (KEYS, SystemMemory, LPB1, 0x100)
89 Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
90 {
91 Offset (0x84),
92 PSAT, 32,
93 }
94
95 PowerResource (PLPE, 0, 0)
96 {
97 Method (_STA)
98 {
99 Return (1)
100 }
101
102 Method (_OFF)
103 {
104 Or (PSAT, 0x00000003, PSAT)
105 Or (PSAT, 0x00000000, PSAT)
106 }
107
108 Method (_ON)
109 {
110 And (PSAT, 0xfffffffc, PSAT)
111 Or (PSAT, 0x00000000, PSAT)
112 }
113 }
114}