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Shawn Nematbakhsh3bad4cb2015-08-25 18:03:31 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2015 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Shawn Nematbakhsh3bad4cb2015-08-25 18:03:31 -070015 */
16
17#ifndef DPTF_CPU_PASSIVE
18#define DPTF_CPU_PASSIVE 80
19#endif
20
21#ifndef DPTF_CPU_CRITICAL
22#define DPTF_CPU_CRITICAL 90
23#endif
24
25#ifndef DPTF_CPU_ACTIVE_AC0
26#define DPTF_CPU_ACTIVE_AC0 90
27#endif
28
29#ifndef DPTF_CPU_ACTIVE_AC1
30#define DPTF_CPU_ACTIVE_AC1 80
31#endif
32
33#ifndef DPTF_CPU_ACTIVE_AC2
34#define DPTF_CPU_ACTIVE_AC2 70
35#endif
36
37#ifndef DPTF_CPU_ACTIVE_AC3
38#define DPTF_CPU_ACTIVE_AC3 60
39#endif
40
41#ifndef DPTF_CPU_ACTIVE_AC4
42#define DPTF_CPU_ACTIVE_AC4 50
43#endif
44
Jagadish Krishnamoorthy98d62f22015-07-09 00:32:32 -070045External (\_PR.CP00._TSS, MethodObj)
46External (\_PR.CP00._TPC, MethodObj)
47External (\_PR.CP00._PTC, PkgObj)
48External (\_PR.CP00._TSD, PkgObj)
49External (\_PR.CP00._PSS, MethodObj)
Lee Leahy32471722015-04-20 15:20:28 -070050External (\_SB.DPTF.CTOK, MethodObj)
Lee Leahy77ff0b12015-05-05 15:07:29 -070051
Lee Leahy32471722015-04-20 15:20:28 -070052Device (B0DB)
Lee Leahy77ff0b12015-05-05 15:07:29 -070053{
Lee Leahy32471722015-04-20 15:20:28 -070054 Name (_ADR, 0x000B0000) /* Bus 0, Device B, Function 0 */
Lee Leahy77ff0b12015-05-05 15:07:29 -070055
56 Method (_STA)
57 {
58 If (LEqual (\DPTE, One)) {
59 Return (0xF)
60 } Else {
61 Return (0x0)
62 }
63 }
64
65 /*
66 * Processor Throttling Controls
67 */
68
69 Method (_TSS)
70 {
Jagadish Krishnamoorthy98d62f22015-07-09 00:32:32 -070071 If (CondRefOf (\_PR.CP00._TSS)) {
72 Return (\_PR.CP00._TSS)
Lee Leahy77ff0b12015-05-05 15:07:29 -070073 } Else {
74 Return (Package ()
75 {
76 Package () { 0, 0, 0, 0, 0 }
77 })
78 }
79 }
80
81 Method (_TPC)
82 {
Jagadish Krishnamoorthy98d62f22015-07-09 00:32:32 -070083 If (CondRefOf (\_PR.CP00._TPC)) {
84 Return (\_PR.CP00._TPC)
Lee Leahy77ff0b12015-05-05 15:07:29 -070085 } Else {
86 Return (0)
87 }
88 }
89
90 Method (_PTC)
91 {
Jagadish Krishnamoorthy98d62f22015-07-09 00:32:32 -070092 If (CondRefOf (\_PR.CP00._PTC)) {
93 Return (\_PR.CP00._PTC)
Lee Leahy77ff0b12015-05-05 15:07:29 -070094 } Else {
95 Return (Package ()
96 {
97 Buffer () { 0 },
98 Buffer () { 0 }
99 })
100 }
101 }
102
103 Method (_TSD)
104 {
Jagadish Krishnamoorthy98d62f22015-07-09 00:32:32 -0700105 If (CondRefOf (\_PR.CP00._TSD)) {
106 Return (\_PR.CP00._TSD)
Lee Leahy77ff0b12015-05-05 15:07:29 -0700107 } Else {
108 Return (Package ()
109 {
110 Package () { 5, 0, 0, 0, 0 }
111 })
112 }
113 }
114
115 Method (_TDL)
116 {
Jagadish Krishnamoorthy98d62f22015-07-09 00:32:32 -0700117 If (CondRefOf (\_PR.CP00._TSS)) {
118 Store (SizeOf (\_PR.CP00._TSS ()), Local0)
Lee Leahy77ff0b12015-05-05 15:07:29 -0700119 Decrement (Local0)
120 Return (Local0)
121 } Else {
122 Return (0)
123 }
124 }
125
126 /*
127 * Processor Performance Control
128 */
129
130 Method (_PPC)
131 {
132 Return (0)
133 }
134
135 Method (SPPC, 1)
136 {
137 Store (Arg0, \PPCM)
138
139 /* Notify OS to re-read _PPC limit on each CPU */
140 \PPCN ()
141 }
142
143 Method (_PSS)
144 {
Jagadish Krishnamoorthy98d62f22015-07-09 00:32:32 -0700145 If (CondRefOf (\_PR.CP00._PSS)) {
146 Return (\_PR.CP00._PSS)
Lee Leahy77ff0b12015-05-05 15:07:29 -0700147 } Else {
148 Return (Package ()
149 {
150 Package () { 0, 0, 0, 0, 0, 0 }
151 })
152 }
153 }
154
155 Method (_PDL)
156 {
157 /* Check for mainboard specific _PDL override */
158 If (CondRefOf (\_SB.MPDL)) {
159 Return (\_SB.MPDL)
Jagadish Krishnamoorthy98d62f22015-07-09 00:32:32 -0700160 } ElseIf (CondRefOf (\_PR.CP00._PSS)) {
161 Store (SizeOf (\_PR.CP00._PSS ()), Local0)
Lee Leahy77ff0b12015-05-05 15:07:29 -0700162 Decrement (Local0)
163 Return (Local0)
164 } Else {
165 Return (0)
166 }
167 }
168
169 /* Return PPCC table defined by mainboard */
170 Method (PPCC)
171 {
172 Return (\_SB.MPPC)
173 }
Shawn Nematbakhsh3bad4cb2015-08-25 18:03:31 -0700174
Lee Leahy77ff0b12015-05-05 15:07:29 -0700175 Method (_CRT)
176 {
Lee Leahy32471722015-04-20 15:20:28 -0700177 Return (\_SB.DPTF.CTOK(DPTF_CPU_CRITICAL))
Lee Leahy77ff0b12015-05-05 15:07:29 -0700178 }
Lee Leahy77ff0b12015-05-05 15:07:29 -0700179
Lee Leahy77ff0b12015-05-05 15:07:29 -0700180 Method (_PSV)
181 {
Lee Leahy32471722015-04-20 15:20:28 -0700182 Return (\_SB.DPTF.CTOK(DPTF_CPU_PASSIVE))
183 }
Lee Leahy32471722015-04-20 15:20:28 -0700184
Lee Leahy32471722015-04-20 15:20:28 -0700185 Method (_AC0)
186 {
187 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC0))
188 }
Lee Leahy32471722015-04-20 15:20:28 -0700189
Lee Leahy32471722015-04-20 15:20:28 -0700190 Method (_AC1)
191 {
192 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC1))
193 }
Lee Leahy32471722015-04-20 15:20:28 -0700194
Lee Leahy32471722015-04-20 15:20:28 -0700195 Method (_AC2)
196 {
197 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC2))
198 }
Lee Leahy32471722015-04-20 15:20:28 -0700199
Lee Leahy32471722015-04-20 15:20:28 -0700200 Method (_AC3)
201 {
202 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC3))
203 }
Lee Leahy32471722015-04-20 15:20:28 -0700204
Lee Leahy32471722015-04-20 15:20:28 -0700205 Method (_AC4)
206 {
207 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC4))
Lee Leahy77ff0b12015-05-05 15:07:29 -0700208 }
Lee Leahy77ff0b12015-05-05 15:07:29 -0700209}